Post on 11-May-2015
Verification of Wireless SoCs:No Longer in the Dark Ages
J. Scott RunnerSr. Director of Design Verification
PAGE 2 QCT QMS Review I Q2 ‘06 | April 12, 2006
Talk Outline
The Mobile Device EraWhat’s in a highly integrated wireless chipset today?Challenges and Opportunities in the Mobile EraTraditional Wireless VerificationNext Generation Wireless VerificationSummary: Are you ready?
“If it isn’t tested, it doesn’t work”
Dr. Klein Gilhousen (Qualcomm Co-founder)Dr. Roberto Padovani (Qualcomm CTO)
PAGE 3 QCT QMS Review I Q2 ‘06 | April 12, 2006
Exit: The PC Era, Entering: the Mobile Device Era
Highly integrated, Highly Heterogeneous, Interoperable
PAGE 4 QCT QMS Review I Q2 ‘06 | April 12, 2006
Today’s Highly Integrated Wireless Devices
Multiple processors (multiple RISC, multiple DSP)
Many modems (WAN, LAN, PAN)
Significant multi-media (graphics, video, video)
Many peripherals: wired and wireless: SD, USB, PCIe,…
Special functions: security, power
RF, analog mixed signal, digital
A lot of memory
SIP (System in Package) or SoC (System on a die)
Concurrency: e.g. modem + GPS + applications + multi-media for advanced location based services
Multiple processors (multiple RISC, multiple DSP)
Many modems (WAN, LAN, PAN)
Significant multi-media (graphics, video, video)
Many peripherals: wired and wireless: SD, USB, PCIe,…
Special functions: security, power
RF, analog mixed signal, digital
A lot of memory
SIP (System in Package) or SoC (System on a die)
Concurrency: e.g. modem + GPS + applications + multi-media for advanced location based services
MemoryMemory
ApplicationApplicationRISCRISC
GSM/GPRSGSM/GPRSWLAN/PANWLAN/PAN
ModemsModems
GPSGPS
3D Graphics3D Graphics
Hi res VideoHi res Video
AudioAudio
PeripheralsPeripherals
WAN ModemsWAN Modems(CDMA, (CDMA, UMTSUMTS……))
DSPDSP
PMRF
PAGE 5 QCT QMS Review I Q2 ‘06 | April 12, 2006
SW/FW a Significant Part of Wireless Mobile Solutions
• Support multiple OSes• Millions of lines of SW code
• Comm stack• Multi-media stack• Peripheral drivers
• Hard real time, soft real time and non-real time• Functionality is increasingly SW programmable• Increase in concurrent SW threads in embedded • HW-SW interactions must be robust• Download feature updates may hit new design functions – how well tested?• No longer sufficient for “SW to be booted”. Extensive HW-SW interaction verification required.• Significant SW reuse requirement
PAGE 6 QCT QMS Review I Q2 ‘06 | April 12, 2006
Key Challenges & trends of the Mobile EraRich Feature roadmap: Lots of product features in demand
Many consumers buy new cellphone models every 9-12 months with new featuresCost is Critical: Highly integrated heterogeneous devices
Phone + camera + camcorder + music player + PDA + location-based services + push-to-talk + ultra-mobile PC
Power ConsciousNew power reduction schemes have complex functional implicationsCost is a function of quality (excuse by Philip Crosby)
Transparent Interoperability criticalMany communication protocols, on the fly…concurrently
– WAN: CDMA2000, UMTS/WCDMA, OFDM, LTE– LAN: WiFi/ OFDM…– PAN/BAN: Bluetooth, USB, UWB, etc.
Heterogeneous and extremely variable HW architectures to support – higher concurrencyMCP: Multiple processors/DSPs and HW acceleration. Greatly increasing number of HW and SW threads.
– Scalable: ability to move task between RISC, DSP, HWIncreasingly more programmable, yet special purpose (i.e. heterogeneous) HWRF/Analog mixed-signal integrationNon-orthogonal HW (power, security, etc).Increased levels of heterogeneous concurrency
– Exponential: More threads per functional unit….more unitsEmbedded Software complexity growth is even faster than HW
SIGNIFICANT amount of embedded SW. SW complexity doubles faster than Moore’s Law
PAGE 7 QCT QMS Review I Q2 ‘06 | April 12, 2006
Wireless Verification: The “Dark Ages”Golden System Vectors
System Model
Cfg/DF
results
DUV
Monitor
compare
cfg driver DF driver
Bit accurate system model used for fixed pt modeling of algorithm transformation
• Matlab• C++/SystemC
“system vectors” pre generated as “golden vectors”
Played against DUT with simple bit accurate comparison
Disadvantages:• Lack of reactivity• Black-box: generally produces 25-75% functional coverage• Lack of Functional Coverage • Interactions: Reactivity for Complex Crosses• Controllability/ visibility granularity• Lack of support for integration verification
RTL VerificationRTL VerificationAlgorithm ValidationAlgorithm Validation
InputData
DUVcfg
ExpectedOutput
Matlab, SystemC/C++/C
Analysis
Spec
PAGE 8 QCT QMS Review I Q2 ‘06 | April 12, 2006
Wireless Verification: The Modern EraModel Based
System Model
Cfg/DF
DUV
Monitor
compare
cfg xactor DF xactor
Tests
Bit accurate system model used for fixed pt modeling of algorithm transformation
• Matlab• C++/SystemC• Integrated Analysis (not just stand alone)
Reuse the model, not system vectorsSpec becomes:
- model- constraints- assertions
Advantages:• Reactive to temporal variations in DUV•Tends to foster other verification enhancements: assertions at different levels of integration & abstraction• Enables achievement of 100% coverage• Support successive integration verification & debug • Caveat: Requires planned modelling strategy
RTL VerificationRTL Verification
InputData
DUVcfg
ExpectedOutput
Matlab, SystemC/C++/C
TransactorSelf-Check
Generator
Testswavefrmdebugger
algorithmdebugger
C/xactiondebugger
CoverageDatabase
XactionLevel Log
Analysis
System Mdl
Algorithm ValidationAlgorithm Validation
Spec
Constraints Assertions
ReferenceModel
Cov mdl
Watch pts
PAGE 9 QCT QMS Review I Q2 ‘06 | April 12, 2006
Results: Constraint-based (CB)/Directed Random + ABV Works!
Significant reduction in post silicon defectsFaster time to stabilityIncreased predictability
6K VFE Cumulative Defects
0
2
4
6
8
10
12
14
16
Dec-03
Feb-0
4Apr-
04Ju
n-04
Aug-04
Oct-04
Dec-04
Feb-0
5Apr-
05Ju
n-05
Aug-05
Oct-05
Dec-05
Feb-0
6Apr-
06Ju
n-06
Cum
ulat
ive
CR
Cou
nt
CRITICALHIGHMEDIUMLOW
7K VFE Cumulative Defects
02468
101214161820
Oct-04
Dec-04
Feb-0
5Apr-
05Ju
n-05
Aug-05
Oct-05
Dec-05
Feb-0
6Apr-
06Ju
n-06
Cum
ulat
ive
CR
Cou
nt
CRITICALHIGHMEDIUMLOW
Less than ½ the time to stabilize
HV
L C
onst
rain
t-bas
edG
olde
n V
ecto
rsPercentage of bugs detected by Method
Dataflow Dominant
Assertions 30%Scoreboard Checkers 61%Linting 4%Other 5%
Assertions 30%Scoreboard Checkers 61%Linting 4%Other 5%
Assertions 20%Scoreboard Checkers 72%Linting 3%Other 5%
Assertions 20%Scoreboard Checkers 72%Linting 3%Other 5%
Control Dominant
PAGE 10 QCT QMS Review I Q2 ‘06 | April 12, 2006
Verification of RF/AMS – Digital (“Big D/Little a”)
Tx DAC
High LinearityA/D
CLK Out
Digital
GeneralPurposeInterface
QDSP4000
CDMA/GPSProcessors
PLL
Rx BuffDriver
SSBI
Rx/Tx SSBI
CLK Gen
PMICSSBI
QuadMod
GPIO Model
ARM926EJ
Wideband Stereo Codec
A/D
UXMC
SDInterface
BehavioralModel/Monitor
Ext Mode Select
Digital Test Bus
Config ModelJTAG Model
Memory
SD Model
CamifInterface
UARTs/UIMs
JTAGInterface
Mode SelectInterface
USB
padring
Analog/RF
TestplanConnectivity
Match with the pin list of the digital dieAbility to toggle all the interconnectionsValidate polarities
InteractivityPoint-to-pointEnd-to-end (chain)Full mission modeConcurrency
Systems ScenariosAll functional and structural configurationsSupport other components for common modes of operationMultiple concurrent chains
TestplanConnectivity
Match with the pin list of the digital dieAbility to toggle all the interconnectionsValidate polarities
InteractivityPoint-to-pointEnd-to-end (chain)Full mission modeConcurrency
Systems ScenariosAll functional and structural configurationsSupport other components for common modes of operationMultiple concurrent chains
RF/AMSFlow
Digital(MSM)Flow
RF/analog
DigitalI/F Mdl
PAGE 11 QCT QMS Review I Q2 ‘06 | April 12, 2006
Implications of Power Management on Verification
Complex power management techniques: dynamic voltage and frequency scaling, multi-Vt, head/foot switches, multiple voltage islands…etc are increasing design and verification complexityInteractions between functionality and physical power management not always obvious and require new methodologiesEffects have “analogish” look to them (continuous voltage)HW-SW power interactions must be considered as well
Medium
Courtesy: Cadence Design Automation public white paper
PAGE 12 QCT QMS Review I Q2 ‘06 | April 12, 2006
Summary: Are You Ready?
The Mobile Era presents many challenges and opportunities for DV engineersConvergence of communications (WAN, LAN, PAN), multimedia, peripherals (wired and wireless), processors, SoC/SIPHybrid technologies: RF, AMS, logic, memoryMultiple challenges to deal with– Power, security
Looks familiar?Confluence of domains and problems from processor, networking and other applicationsRequires advances in design & verification methods
Key TrendsIntegrationHeterogeneityInteroperability of different thingsConcurrency
Know what you are verifying!Learn domainsDomains have similaritiesDepth and breadth
Thank you!
Roberto Padovani's (QCOM CTO) favorite quote: “If it isn’t tested, it doesn’t work”
Dr. Klein Gilhousen (Qualcomm Co-founder)