Power Adaptive Computing System DePower Adaptive Computing System De

Qi Li 1 J W L 2 TQiang Liu1, Jun Wen Luo2, Terrg , ,1Department of Comp t1Department of Comput

2School of Electrical Electronic and C2School of Electrical, Electronic and C

1 I t d ti d M ti ti1 I t d ti d M ti ti For the power adaptive sy1. Introduction and Motivation1. Introduction and Motivation For the power adaptive sydynamic power consumption mdynamic power consumption m

Traditional energy storage system has the drawback that 1gy g ycan not working in long time due to the limitation of battery fCVP 21can not working in long time due to the limitation of batteryor ultra capacitors With advances in energy harvesting

fCVPower 2or ultra capacitors. With advances in energy harvesting

t it i ibl t i l t lf d tsystem, it is possible to implement a self – powered system The system works as follows:that harvests ambient energy from environment such as

The system works as follows:gy

solar vibration and wind Such energy harvesting systemsolar, vibration and wind. Such energy harvesting systemprovides a promising alternative to battery powered systemprovides a promising alternative to battery powered system

d t t it f hit t d d iand creates an opportunity for architecture and designmethod innovation for the exploitation of ambient energyp gysourcesource.

In this poster, we present a new approach to developIn this poster, we present a new approach to developpower adaptive computing system which can efficiently usepower adaptive computing system which can efficiently useenergy harvesting from ambient source and the highlightsenergy harvesting from ambient source, and the highlightsare:

t t ti i ti h f d i i• a two stage optimization approach for designing poweradaptive systems.p y

• a custom convex model used at run – time to determineclock gating schemes, adjusting system powerclock gating schemes, adjusting system powerconsumption to instant power supplied from a solarconsumption to instant power supplied from a solarharvesterharvester.

Figure 4: A power adaptive enFigure 4: A power adaptive en

i Gl b l i ll t d2 Research hypothesis and Objective2 Research hypothesis and Objective i. Global memories collected2. Research hypothesis and Objective2. Research hypothesis and Objectiveyp jyp j

ii The system controller senii. The system controller senand run time optimizer to brand run –time optimizer to br

iii The estimator estimatesiii. The estimator estimatesminutes and optimizer determinutes and optimizer deter

h b d th tischeme based on the estima

iv The computing systemiv. The computing systemt ll t i d t tcontrollers triggers data transFigure 1 : The energy harvesting system. It consists of six g gy g y

major components to ensure a robust and stable systemi When finish the computin

major components to ensure a robust and stable system performance i. When finish the computin

sends back a signal and agaperformance.

sends back a signal and aga

900

1000

900

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E H t 3 M th d l d3 M th d l d700

800

700

800 • Energy Harvester 3. Methodology and3. Methodology and600

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2 )

The solar panel results from3. Methodology and3. Methodology and

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we

r (W

400

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we

r (W The solar panel results from

harvesting the sun radiation ToTo developdevelop andand managemanage tt300300

harvesting the sun radiation22/10/2010

ToTo developdevelop andand managemanage ttadaptiveadaptive systemsystem wewe propopropo

100

200

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200 on 22/10/2010. adaptiveadaptive system,system, wewe propopropoti i titi i ti hh0 100 200 300 400 500 600 700 800 900 1000

0

Time (minute)0 100 200 300 400 500 600 700 800 900 1000

0

Time (minute)optimizationoptimization approachapproach..

10

X: 4927Y: 9.796

0.4kW/m2

0 6kW/m2

10

X: 4927Y: 9.796

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0 6kW/m2 D i ll l• MPPT 8

9

X: 4924Y: 7.827

0.6kW/m

0.8kW/m2

1kW/m2

8

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X: 4924Y: 7.827

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1kW/m2 Design a parallel comf

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g papplications with explThe figure shows that the 5

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er(W

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applications with expll i li i d lmaximum power points

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4Y: 3.899

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4Y: 3.899 loop pipelining and loo

change as solar insolation 22

p p p gg

changes. 0 1000 2000 3000 4000 5000 60000

1

Voltage(mV)0 1000 2000 3000 4000 5000 6000

0

1

Voltage(mV)c a ges Voltage(mV)Voltage(mV)

Design the Run – timeDesign the Run timet dFor power prediction we employ a method based on system power modeFor power prediction, we employ a method based on

i ht d f th hi t i l d i

y poptimizerweighted sum of the historical average and previous optimizer.

day’s values. The results are shown as follows:y••DesignDesign--timetime optimizationoptimization

10001000

DesignDesign--timetime optimizationoptimization

900

1000 Actuall energy source

Esitmator performace(Best)

Esitmator performance (worst )900

1000 Actuall energy source

Esitmator performace(Best)

Esitmator performance (worst ) The objective is to minimize800800

The objective is to minimizeThe design optimization proble700700 The design optimization proble

500

600

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400

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minmin iik(T 300300

minmin ii,k,(T 200200

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100

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100

subjectsubject toto i,k,(R 2000 3000 4000 5000 6000 7000 8000

0

Time (min)

2000 3000 4000 5000 6000 7000 80000

Time (min)

subjectsubject toto mem i,k,(R

Figure 2: The estimator performance ,k,(R g pcomp ,k,(R

It can be seen the prediction accuracy is depended on theThis stage decides the compu

p y psample length time, weight value and change rate of

This stage decides the compud H thi k

sample length time, weight value and change rate ofweather Here is the relationship between prediction

speed. However, this peakweather. Here is the relationship between prediction

(MAPE) d th h tachievable due to the chan

accuracy (MAPE) and throughput.energy harvesting environmenenergy harvesting environmen

0.6

System with controller0.6

System with controller

0.5

System without controller

0.5

System without controller

•• RunRun--timetime optimizationoptimization0.4

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1)1) powerpower modelmodel:: FFor the pa0.2

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)) pp pderived in the previous sderived in the previous sconsumption variation wit0.10.1 consumption variation wit

0.65 0.7 0.75 0.8 0.85 0.90

MAPE

0.65 0.7 0.75 0.8 0.85 0.90

MAPE

schemes can be expressed iMAPEMAPE

p

Fi 3 Th l ti hi b t MAPE d th h t PPP Figure 3: The relationship between MAPE and throughput puconstc PmPP puconstc

Wh th fi t t i6.5

System with controllerSystem without controller

6.5

System with controllerSystem without controller

• Energy Storage Where the first part is sys66

Energy Storagesingle work unit consumptio5.5

ut

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The design should obeyg p

different clock gating scheme5

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rou

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energy neutral operation,different clock gating scheme

4.54.5 gy pwhich ensures a nominal44

system operation principle.150 200 250 300 350 4003.5

Battery Capacity

150 200 250 300 350 400

3.5

Battery Capacity

system operation principle.Battery Capacity Battery Capacity

esign in Energy Harvesting Environmentesign in Energy Harvesting Environment

M k2 W L k1 Al Y k l 2rence Mak2, Wayne Luk1, Alex Yakovlev2, y ,

ting Imperial College London UKting, Imperial College London, UK

Computer Engineering Newcastle University UKComputer Engineering, Newcastle University, UK

ystem (Figure 4) a typical 2 ) Customized optimization model:2 ) Customized optimization model:ystem (Figure 4), a typicalmodel for CMOS circuits is

2 ) Customized optimization model:2 ) Customized optimization model:model for CMOS circuits is

AA simplified optimization problem is customized fromAA simplified optimization problem is customized fromthe previous constraints and shown below:the previous constraints and shown below:

minmin )m(T)m(T)m(Tt)1v( i min min )m(T)m(T)m(Tt)1v( outcompin

Subject to maxSubject to max t))m(T),m(T),m(T( ti Subject to maxSubject to max t))m(T),m(T),m(T( outcompin

P)m(P P)m(P sc

1 K1 Km

111 vmL 1 vmL

This customized optimization model can be transformedThis customized optimization model can be transformedfinto a convex model, leading to an optimal and fast

solution. For the test applications, the system speed issolution. For the test applications, the system speed ismaximum while the system power consumption is notmaximum while the system power consumption is notgreater than the supplier powergreater than the supplier power.

4 Results and Discussion4. Results and Discussionnabled computing system

In our experiments the power adaptive system isnabled computing system

In our experiments ,the power adaptive system isl t d h d l tf h i Fi 5 Thevaluated on a hardware platform shown in Fig. 5. The

d t d t d power estimator and system controller are on adata and stored. p yARM926EJ-S processor running at 160MHz and havingARM926EJ S processor running at 160MHz and having64MByte SDRAMs while computation system is mappednds signals to the estimator 64MByte SDRAMs, while computation system is mapped

t Vi t 5 330t FPGA ith 192 DSP d 324RAMnds signals to the estimatorring them to work onto Virtex5 -330t FPGA with 192 DSP and 324RAM.ring them to work.

s power supply in next 5s power supply in next 5rmine a proper clock gatingrmine a proper clock gatingtator

received signals and localreceived signals and localf d tisfers and computing

ng job the local controllerng job, the local controllerinin.

Fi 5 E i t l h d l tfFigure 5: Experimental hardware platform

dd PP Three benchmarks are shown:dd ProgrammeProgramme Three benchmarks are shown:d d ProgrammeProgrammehehe aboveabove describeddescribed powerpowerhehe aboveabove describeddescribed powerpoweroseose aa twotwo stagestage designdesignoseose aa twotwo –– stagestage designdesign

ti t fmputing system forp g yloitation of data useloitation of data use,

ll li iFi 6 M t i lti li ti

op parallelizationFigure 6: Matrix multiplication

p p

e optimization: a) ae optimization: a) al d b) f tel and b) a fast)

e the system execution timeFigure 6: K – means clustering algorithm

e the system execution time.em is the following: g g gem is the following:

)i )i

sRe)ii ramsRe)ii

sRe)ii, compsRe)ii,

Figure 8: Sobel edge detectionutation structure with the peak Figure 8: Sobel edge detectionutation structure with the peakd t b l In addition, we also compare two different approaches tospeed may not be always In addition, we also compare two different approaches to

determine the clock gating scheme:nging power supplier in the determine the clock gating scheme:g g p ppntnt.

arallel computation structurepsection the system powersection, the system powerth different clock gatingth different clock gatingn a model as:

C5. Conclusion and Future work5. Conclusion and Future workWe present a two-stage optimization approach forWe present a two stage optimization approach fordesigning power adaptive computing systems applied int l d PU i designing power adaptive computing systems applied in

i t Th i t id t tistem power loss and PU is a

environments. The purpose is to provide computationon when experimenting withcapability to nodes in distributed sensor work.

p ges m is the number of units p y

F t k i l d i i ffi i d d i

es , m is the number of units.Future work includes improving efficiency and designapproach to energy harvesting networks.pp gy g