Post on 25-Jun-2020
WISE 2000
Paradigm Shift in Semiconductor Paradigm Shift in Semiconductor Business and ManufacturingBusiness and Manufacturing
Tohru OgawaSemiconductor Company
Sony Corporation
WISE 2000
ContentsContents
Paradigm Shift in Semiconductor Business
Sony’s Lithography Roadmap
Flexible Manufacturing Line
Conclusion
WISE 2000
Digitalization creates a new market combining Consumer, Network and PC applications.
Paradigm Shift through DigitalizationParadigm Shift through Digitalization
A
O
1980 1990 2000
AnalogAnalogAnalogAudio
Video
Computing
Communication
Entertainment
ConvergenceConvergence
TV 8mmVideoTV
Tape Rec
CDCD MDMD
WM
MP3MP3
PS1PS1
DVCDVC DVDDVD DTVDTV
VAIO VAIOVAIO
PS
VAIOVAIO
PDC
CDMA Cable Modem
Computing
Networking
Consumer
PS2PS2DigitalDigitalDigital
WISE 2000
Paradigm Shift in Semiconductor ProductsParadigm Shift in Semiconductor Products
[Year]1991 1993 1995 1997 1999 2001 2003 2005 2007 2009 2011Ref. Nikkei Microelectronics (1999)
System LSI
Total Market Volume (W/W)
7
6
5
4
3
2
1
01999 2003
Sal
es (
B$)
D-STB
DVD
Video CD
DTV
DSC
Digital Camcorder
Others
Video Game Consoles
(Dataquest, June ’99)
LS
I Mar
ket
Vo
lum
e (B
$)
1400
1200
1000
800
600
400
200
0
WISE 2000
Impact of Digitalization on LSIImpact of Digitalization on LSI
Large scale system LSI (SOC) with embedded DRAM
Flash memory becomes major storage media
Consumer products are merging with network and PC
Software and security play more important role
WISE 2000
Shift in Values in ElectronicsShift in Values in Electronics- Network oriented business lowers the status of hardware. - High specialization and standardization result in “horizontal” business model.
Hardware
Network
Small
Large
Value Added
Consumer Manufacturer
+ LSI Manufacturer
Consumer ManufacturerIP ProviderLSI Design EDA VendorsSi Foundry
Software Vendors(Application, OS, Tools )
Contents/Service Provider(Video, Music, e-commerce)
$$
$
WISE 2000
PlayStation 2
Fusion of Graphics, Audio/Video and PC
128bit CPU: “Emotion Engine”Clock 300MHz Main Memory 32MB(Direct RDRAM)
Graphics : “Graphic Synthesizer”Clock 150MHz Embedded Cache VRAM 4MB
SPUI/O Processor CD-ROM Drive: X24 DVD-ROM Drive: X4
WISE 2000
NewNew Vertical IntegrationVertical IntegrationProducts demand new vertical integration with horizontal business model.
Software Vendors
Process development
Fab
Design Service
IP Vendors
Equipment Supplier
Solutions Spec.
ProductsProductsConsumer Manufacturer
WISE 2000
Module Processes by Equipment Suppliers Module Processes by Equipment Suppliers
Saves cost/time/risk of process development by introduction of module processes optimized by equipment suppliers.
Integration
Cu CMP New Low-k CVD
LSI Manufacturer
Equipment Suppliers
LSI Manufacturer /Foundry
Module ProcessEquipmentRecipe
Equipment Suppliers
Module Process
Integration
Equipment Equipment
Cu CMPNew Low-k CVD
Module Process
WISE 2000
ContentsContents
Paradigm Shift in Semiconductor Business
Sony’s Lithography Roadmap
Flexible Manufacturing Line
Conclusion
WISE 2000
Sony’s Lithography Strategy
EPL(VUV)
KrF+RET
ArF+RET
Lithography
501994 1996 1998 2000 2002 2004 2006 2008 2010
Mass-production timing (Year)
Rule (nm)
70
100
130150
180
250
350
DRAM Half Pitch
Gate line (Logic)
ITRS Roadmap (1999)
WISE 2000
“Graphic Synthesizer”The Most Advanced Embedded DRAM LSI
0.25um CMOS4MB Embedded DRAM42.7M TransistorsClock150MHzBand Width 48GBps75M Polygon/sec384 pin BGA
1Metal
Capacitor
W
Cross sectional View
LOCOS
Bit Line
Logic Tr BMD
P-TEOS
Word Line(Buried Metal Diffusion)
WISE 2000
The Feature and Critical Issues of 130nmThe Feature and Critical Issues of 130nmEmbEmb--DRAM LSI ProcessDRAM LSI Process
DRAM
Logic
<Top view>
<Side view>
Si-substrate
Global Step
DRAM Logic
The most advanced design rule to achieve high performance Tr-> Enhance resolution, and refine OPC system (speed, accuracy)
Large variation in duty cycles-> Reduce iso – dense bias
High global step-> Enlarge D.O.F
High aspect hole process-> Enhance etching durability
WISE 2000
Resolution Enhancement Tech. to SubResolution Enhancement Tech. to Sub--100nm100nmDouble Exposure Levenson-PSM
Cr
T-0deg
T-180deg
Binary (2-nd exp.)
Levenson (1-st exp.) Levenson+Binary
100nm
After Lithography
λ: 248nm
NA: 0.68
Illu: 1/2 Ann.
WISE 2000
Requirements for ArF Litho. to Below 100nmRequirements for ArF Litho. to Below 100nmArF exposure system- High NA (>0.70), - Small Aberration, - Same performance in each machine,- Reduce initial and running cost, - Stability including ArF laser,
ArF resist - Resolution
- Gate: 100nm logic gate (iso, semi-iso), DRAM(gate 130nm)- Contact: 150nm- Edge roughness: <1nm
- Etching durability: aspect ratio>10 in contact process- Defect density: none
Mask- High CD uniformity to get MEF 1.6 – 1.7- Defect density: same as NTRS- Grid size change: 5nm ->2nm- High durability in transmittance and phase for ArF laser light and
chemical damage- High accuracy phase control- Price and T.A.T
WISE 2000
Key Issues for Mask Cost ReductionKey Issues for Mask Cost ReductionCritical issues- Mask writer: throughput / price
- Inspection tool: throughput / price
How to foster suppliers?For 130nm era:
- Cooperative work between
supplier, consortium, and users.
For below 100nm era:
- World wide strong cooperation.
350nm 250nm 180nm
Tech. Node
Mas
k C
ost
Pure Logic
1
2
3
4
5
1.0
1.5
2.7
WISE 2000
ContentsContents
Paradigm Shift in Semiconductor Business
Sony’s Lithography Roadmap
Flexible Manufacturing Line
Conclusion
WISE 2000
Characteristics of System LSI MarketCharacteristics of System LSI Market
Needs new process development and production strategy optimized forsystem LSI market characteristics.
MPU System LSIDRAM
Cost, Low Power, Functionality
Customized (Analog, Emb. DRAM)
Medium
Many Products/Low Volume
Q-TAT, Flexibility, IP
Cost, Speed
DRAM
Large
Few Products/High Volume
Scale Merit
High Speed
Logic
Large
Few Products/High Volume
Early Introduction of Advanced
Process
Requirement
Device
Market Size
Production
KFS
WISE 2000
Products and Production LinesProducts and Production LinesMini Lines (Scalable Lines) enable both flexibility and efficiency of capital investment.
High HighLow
LowLowHigh
Volume/Products Low/Many Medium/Few High/Few
Mini Line
MultipleMini Lines
Large Line(Scale Merit)Memory, MPU
System LSI
ROI Risk
Flexibility
WISE 2000
Mini Line: ConceptMini Line: Concept
Conventional Line
Demand
ProductionVolume
Line #1
Line #2
Mini Line #1
Mini Line #2
Mini Line #3
Mini Line #4
Surplus
DemandOver Supply
Mini Line #5
Under Supply
Prompt line construction to fit the demand
Mini Line
Shortage
TimeTime
Production Volume
Well balanced wafer supply to market with multiple mini lines
WISE 2000
To Realize MiniTo Realize Mini--line Conceptline Concept……
Capacity (wafers/month)
2000 10000 15000 200005000
Cap
ital
Inve
stm
ent
Target Cost
Estimated Cost
Equipment Price/Level
Pro
cess
Tim
e
Diffusion/LP-CVD
P-CVD/WET/CMP
Slow
Fast
ExpensiveAffordable
Improve Capital EfficiencyIm
pro
ve T
.A.T
Target- Wafer Capacity: 1/3 - Capital Investment: 1/3 - TAT: A.S.A.P
Critical issues- Efficiency in Capital Investment - T. A. T
Strategy- Cooperation with Suppliers- Utilization The Small Number of Wafers per Lot
WISE 2000
ConclusionsConclusions
Digital consumer with net working drive New Technology and Business Scheme.
The structure in electronics industry is changing….
New business model for system LSI is needed. - Partnership through target product
Development item in chip company itself should be focused.- Which item is common or specific?- Common module process solution by equipment suppliers and consortium
Flexible mini line is needed.