Optimum Inductor, Capacitor and Transformer Synthesis using EMX and

Continuum

Integrand Software, Inc.www.integrandsoftware.com

UMCJun Hong Ou Ji Wei Hsu Tim Cheng David Chen Lidia Chen Yi Jun Hong Ou, Ji-Wei Hsu, Tim Cheng, David Chen, Lidia Chen, Yi

Ju Wu, Anderson Huang, Yanan Mou, Jacky Zhang, Bigchoug Hung, Victor Liang, David Chen, Zheng Zeng, L.C.Yeh

Public Presentation at UMC booth June 12 2008

Collaboration between UMC and Integrandg

Created industry-first RF/Analog design environment for optimal component designp p g

Scalable component libraries (130nm, 90nm, 65nm)• Planar, symmetric and center-tapped inductors (with PGS)

S l bl MOM it (RF d Mi d M d )• Scalable MOM capacitors (RF and Mixed Mode)

• Baluns and Transformers

— Optimum Inductor Finder (OIF)

— Optimum Capacitor Finder (OCF)

— Optimum Transformer Finder (OTF)

Layout and synthesis within UMC’s FDKLayout and synthesis within UMC s FDK• Uses scalable models of capacitors and inductors

• Fully integrated within Virtuoso® environment

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EMX integrated within FDK for custom designs

CICC 07 paper on Integrated IC balunsp p g

Integrand and UMC have published a paper at CICC p p p2007 titled “Optimal Synthesis of On-Chip Baluns”

Industry first demonstration of high quality on chip IC baluns.

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EMX: “Software Network Analyzer”y

GDSWafer Process Tech File

EMXNetwork Analyzer De-embedding

Same mask GDSII layout used for wafer fabrication

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EMX vs UMC Measand EM simulation

EMX

Electromagnetic simulation• Simulation engine for analysis of various passive structures• Simulation engine for analysis of various passive structures

EMX is extremely fast and accurate— More than 10X faster than other commercial simulators

Proven silicon accuracy for a very large set of UMC designs

• inductors

• capacitors

• transformers

• components+interconnect• components+interconnect

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EMX for UMC structures

Physical Effects on ICsInductor

Physical Effects on ICs• R,L,C and Substrate effects unified and fully

coupled

Super-fast Simulation MOM capacitor

• A few minutes for an inductor or a capacitor

User friendly• Processing “true” layout for UMC

capacitor

slotting rules, via arrays, metal fill, and metal biasing for capacitors

Integrated within UMC’s FDK GUITransformer

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Automated synthesis via scalable modelsy

Inductors

• 4 types of inductor layouts

• Planar, Symmetric, Sym CT, stacked

• Optimize for L and Q

Capacitors

• 4 types (array and mesh with and without ground shieldand without ground shield

• Optimize C and Q

T f B lTransformers, Baluns

• 1 type with 4 types of center-tapping

• Optimize L Q Insertion loss

DAC 2008 7Scalable Model

• Optimize L, Q, Insertion loss

Layout

The Optimum transformer finder (OTF)p ( )

Baluns and transformers are important components of RF devices like mobile phones, wireless devices. Used for converting single-

d d t diff ti l i l ended to differential signal

UMC and Integrand have collaborated to build transformers and baluns on a 90nm process

Ceramic Baluns (e g Murata TDK)Ceramic Baluns (e.g., Murata, TDK)• Insertion loss: 1 – 1.5 dB

• Phase Imbalance: 10 degrees

• Amplitude Imbalance: 0.5dBAmplitude Imbalance: 0.5dB

• Large Area (2mm x 1.2mm)

• Off-Chip, large variation and low yield

UMC Baluns• Insertion Loss: 1 - 1.5 dB

• Phase Imbalance: < 0.25 degrees

• Amplitude Imbalance: < 0.1dB

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• Small Area (300um x 300um)

• On-Chip, low variation, high yield, high performance, high integration

EMX vs Measurement for transformers

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Design Space and of Transformersg p

Design Spacent_in: 1 to 9 turnsnt_innt_out: 1 to 9 turnsturns ratio: 1:1, 1:2, 1:3, 1:4w: 3 to 12 µms: 2um µm

ws: 2um µmod: 75 to 300 µmf: DC to 20 GHznt_out

od

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scalable model

Inductance Mode (Forward)( )

1. Select mode

2 Type in Geometric 2. Type in Geometric Parameters

3. Obtain Electrical ParametersParameters

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Inductance Mode (design)( g )

4) Give Electrical Parameters• Give L1 inductance

• Give a range for L2

• Bandwidth? Delta?

5) Obtain Geometric Parameters of an optimal transformer

OTF automatically minimizes the area?

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Inductance Mode (plot)(p )

plot

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Losses Mode

This is the mode that most designers will use the OTF.In this mode the designer specifies the input and output In this mode the designer specifies the input and output impedances, e.g.,

• Input impedance of package

• Output impedance of driverOutput impedance of driver

The OTF then finds • the optimum transformer

• associated tuning MiM capacitors that will satisfy the loss • associated tuning MiM capacitors that will satisfy the loss constraints

The most important design is a balun which has a single-ended input and a differential outputended input and a differential output

• Example using L_Transformer_ctout_RFVIL

• Primary is not center-tapped

• Secondary is center tapped

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• Secondary is center-tapped

Designing an 802.11B balun(2.5GHz) using losses mode( ) g

Design a single-ended to differential balun with center-tapped output using the following constraints

• 50 Ohms input impedance

• 200 Ohms output impedance

• Minimum insertion loss of –1dB

• Maximum return loss of –10dBMaximum return loss of 10dB

OTF determines

• Balun geometry

I t d O t t MiM it • Input and Output MiM capacitor values to tune the balun

• Minimize area (including MiM area)

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Plotting insertion and return lossesg

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Schematics for 4 types of transformersyp

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Balun silicon verification (Insertion Loss)( )

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Phase and Amplitude imbalancep

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LKQ plotsQ p

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LKQ plotsQ p

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New Advanced model features

Advanced features have been added to the scalable models for UMC

These new features were based on measurements• The models now include temperature dependence

Th d l i l d th bilit t h dl M t C l • The models include the ability to handle Monte-Carlo statistics on process variation

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Temperature coefficient extractionp

Temp coefficient=(percent change in resistance)/degree

StructureTemperature coefficient

IND905 0.46

IND914 0.48

IND916 0 54IND916 0.54

Pure copper (theory) 0.4

Temperature coefficients extracted from Inductor measurements

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measurements

Temperature dependence in EMX: IND905p p

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Monte-carlo statistics

Inter-wafer statistical variation was studied

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Monte-carlo scalable model results

Monte-carlo statistics extracted from the measurements has been included in the scalable the scalable models

L Q

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Summaryy

Successful and ongoing collaboration between UMC and Integrand Software Inc.

• OIF (Inductors with and without PGS)( )

• OCF (Capacitors for RF and Mixed-mode applications)

• OTF (Transformers and Baluns)

E t d d th f ti lit f UMC’ FDKExtended the functionality of UMC’s FDK• Process variation effects in scalable models

• Temperature dependence in models

• Capacitor Mismatch

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Extra Slides

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Inductors: EMX Simulation vs. Measurement

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MOM Capacitorsp

UMC MOM capacitors are accurately simulated by EMX

Need true 3D simulation Need true 3D simulation capabilities to handle metal sidewall and via sidewall capacitance

EMX automatically handles vias, metal bias that can affect the capacitance valuep

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MOM Capacitors: EMX Simulation vs. Measurement

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Scalable Component Modelsp

“Scalable” Models of Inductors and Capacitors

sp

• Spice models parameterized by geometry

• Critical for foundry model

ntCritical for foundry model libraries

• Created using EMX and Continuum

wod

array

nf

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lenstack

Design Space of Inductorsg p

ods

nt wnt

sfw

Design Space

od

Design Spacent: 1.5 to 7.5 turnsw: 3 to 10 µms: 1.5 to 5 µmd 75 300 )(32

),,,(21),,,(1

sntodwfRsubsntodwfCsub

sntodwfLc

==

=

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od: 75 to 300 µmf: DC to 20 GHz

...

...),,,(32 sntodwfRsub =

Design Space of Capacitorsg p p

arrayarray

nf len

f

nf

stackflenstack

Design Spacenf: 7 to 101 fingersMetal stack: 3 to 6 layersl th 5 t 25

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length: 5 to 25 µmarray: 1 to 4xf: DC to 20 GHz

EMX-Continuum™

Scalable Model Generator Design Spacent: 1.5 to 7.5 turns

• Discretization of space

• Built from 1000s of individual component (inductor or capacitor) simulations

W: 3 to 10 µmS: 1.5 to 5 µmOD: 75 to 300 µm

capacitor) simulations

• EMX as simulation engine

• Proprietary techniques used to develop “unified” model

Layout generator(UMC Cadence PCELL)

develop unified model

• Pure RLCK Spice

• Passive by construction EMX-Continuum• Noise analysis correct

Spice ModelsSpectre Eldo Hspice ADS

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Spectre, Eldo, Hspice, ADS

The Optimum Inductor Finder (OIF)p ( )

Design Space Optimization

• Finding optimal inductor Finding optimal inductor design

• Using the scalable spice models

• Almost instantaneous playback (5~10 seconds)

• GUI interface in Cadence Virtuoso

Optimizations

• Maximize Q

• Minimize Area

• Bandwidth optimizations

• Including PGS

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• Including PGS

Optimal Inductor Design for UWBp g

bac

Bandwidth

Trading Q for consistent inductance over wide bandwidth

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The goal of UWB design is to “flatten the inductance”

Typical Model Accuracyyp y

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PGS Designg

PGS capabilities added

Patterned ground plane Patterned ground plane shields substrate

Can increase Q by 30%

3 PGS d l ( l 3 PGS models (planar, symmetric, center-tapped) added to the UMC FDK

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PGSno PGS

UMC’s FDK with the Optimum Inductor Finder

OIF

DAC 2008 40Symbol ViewLayout View Scalable Spice Model

Optimum Capacitor Finder (OCF)p p ( )

Determine optimal capacitor Determine optimal capacitor design based on a number of tradeoffs:

• AreaArea

• Q

• Space/Shape Constraints

Metal Stacks• Metal Stacks

Single-ended or Differential Design

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OCF for RF Applicationspp

plotting

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4 Mixed-mode Capacitors p

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Common Centroid Design of Capaitorsg p

centroid

Common Centroid Design minimizes the effect of mismatch

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Common Centroid Design minimizes the effect of mismatch

EMX direct interface to UMC’s Design Kitg

It is possible to directly access EMX through the UMC FDK (in Virtuoso®)

Allows designers to design components not contained in UMC library

Simulation of components and surrounding interconnects

(proximity effects)

Use the EMX menu to start the

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Use the EMX menu to start the simulation window

EMX interface

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