Post on 21-Nov-2015
U4ECB10 LINEAR INTEGRATED CIRCUITS LAB
Prepared ByPRABHU KUMAR SURARAPU
Assistant ProfessorDepartment of Electronics and CommunicationVel Tech Dr.RR&Dr.SR Techincal University
Chennai
U4ECB10 LINEAR INTEGRATED CIRCUITS LAB
VEL TECHDR.RR&DR.SR TECHNICAL UNIVERSITYPage 2
LINEAR INTEGRATED CIRCUITS LAB
SYALLABUS
1. Design of Inverting amplifier and Non-inverting amplifier, Adder &sub tractor.
2. Design of Integrator and Differentiator.
3. Differential amplifier and Schmitt Trigger using op-amp.
4. Phase shift and Wien bridge oscillators using op-amp.
5. Astable & Monostable multivibrators using Op-Amp.
6. Active low pass, High pass and band pass filters.
7. Design of A/D and D/A convertor.
8. Astable and Monostable multivibrators using NE555 Timer.
9. Study of PLL and its use as Frequency Multiplier
10. Design of Instrumentation amplifier. .
Beyond the syllabus
11. Voltage regulators.
12. Simulation of Active filters using PSICE.
U4ECB10 LINEAR INTEGRATED CIRCUITS LAB
VEL TECHDR.RR&DR.SR TECHNICAL UNIVERSITYPage 3
EXP NO:1 INVERTING AND NON INVERTING AMPLIFIER
1a) INVERTING & NON - INVERTING AMPLIFIER
AIM:
To design an Inverting and noninverting Amplifier for the given specifications using Op-Amp IC 741.
THEORY:
The inverting amplifier is shown in the following Fig1.1. The input signal drives the
invertinginput of the op-amp through resistor R1 . The op-amp has an open-loop gain of A, so
that the output signal is much larger than the error voltage. Because of the phase inversion, the
output signal is 180 out-of-phase with the input signal. This means that the feed back signal
opposes the input signal and the feedback is negative or degenerative.
Figure 1.1
Basic Inverting Amplifier
U4ECB10 LINEAR INTEGRATED CIRCUITS LAB
VEL TECHDR.RR&DR.SR TECHNICAL UNIVERSITYPage 4
PIN DIAGRAM:
Figure 1.2Pin diagram of IC 741
DESIGN:
We know for an inverting Amplifier ACL = RF / R1Assume R1 ( approx. 10 K ) and find RfHence Vo = - ACL Vi .Design the Inverting amplifier with the specifications: 1. R1=5 K,2.R1=2 K and 3.22 K
CIRCUIT DIAGRAM
Figure 1.3Inverting Amplifier Connection Diagram
APPARATUS REQUIRED:
U4ECB10 LINEAR INTEGRATED CIRCUITS LAB
VEL TECHDR.RR&DR.SR TECHNICAL UNIVERSITYPage 5
S.No Name of the Apparatus Range Quantity1. Function Generator 3 MHz 12. CRO 30 MHz 13. Dual RPS 0 30 V 14. Op-Amp IC 741 15. Bread Board As per requirement 16. Resistors As per design As per design7. Connecting wires and probes As required As required
PROCEDURE:
1. Connections are given as per the circuit diagram.
2. + Vcc and - Vcc supply is given to the power supply terminal of the Op-Amp IC.
3. By adjusting the amplitude and frequency knobs of the function generator,
appropriate input voltage is applied to the inverting input terminal of the Op-Amp.
4. The output voltage is obtained in the CRO and the input and output voltage
waveforms are plotted in a graph sheet.
THEORY:NON-INVERTING AMPLIFIER:
A typical non-inverting amplifier with input resistor R1 and a feedback resistor Rf is shown in the
following figure 1.5 . The input voltage is given to the positive terminal.
V O=(1+ (R f / R1))VidDESIGN:
We know for a Non-inverting Amplifier ACL = 1 + ( RF / R1)
Assume R1 ( approx. 10 K ) and find Rf,Hence Vo = ACL Vi Design the Non Inverting amplifier with the specifications:1.R1=5 K,2.R1=2 K and 3.22 K
U4ECB10 LINEAR INTEGRATED CIRCUITS LAB
VEL TECHDR.RR&DR.SR TECHNICAL UNIVERSITYPage 6
CIRCUIT DIAGRAM OF NON INVERITNG AMPLIFIER:
Figure 1.4Non Inverting Amplifier Connection Diagram
OBSERVATION TABLE:
S.No InputOutput
Practical Theoretical
1.Amplitude( No. of div x Volts per div )
2.Time period( No. of div x Time per div )
MODEL GRAPH(Inverting Amplifier)
U4ECB10 LINEAR INTEGRATED CIRCUITS LAB
VEL TECHDR.RR&DR.SR TECHNICAL UNIVERSITYPage 7
Figure 1.5(a) Figure 1.5(b)
Input wave form Output Wave forms
MODEL GRAPH:(Non inverting amplifier)
Figure 1.6(a) Figure 1.6(b)
Input wave form Output wave form
U4ECB10 LINEAR INTEGRATED CIRCUITS LAB
VEL TECHDR.RR&DR.SR TECHNICAL UNIVERSITYPage 8
RESULT:
The design and testing of the inverting and non inverting amplifier is done and the input and
output waveforms were drawn.
VIVA QUESTIONS:
1. What is an op-amp?2. Give the characteristics of an ideal op-amp.3. How a non-inverting amplifier can be converted into voltage follower?
4. What is the necessity of negative feedback? 5. What do you mean by unity gain bandwidth?
U4ECB10 LINEAR INTEGRATED CIRCUITS LAB
VEL TECHDR.RR&DR.SR TECHNICAL UNIVERSITYPage 9
EXP.NO: 1(b) ADDER AND SUBTRACTOR USING OP-AMP.
AIM:
To construct an Adder and Subtractor using OP-AMP and verify its working.
THEORY:
ADDER:
The gain for each input to the adder depends upon the ratio of the feedback resistance
of the circuit to the value of the resistor at that input. The adder is sometimes called a weighted
adder because it provides a means of multiplying each of the inputs by a separate constant
before adding them all together. It can be used to add any number of inputs and multiply each
input by a different constant. This makes it useful inapplications like audio mixers.
Figure 2.1
Circuit diagram for Adder
Its behavior is governed by the following equation:
U4ECB10 LINEAR INTEGRATED CIRCUITS LAB
VEL TECHDR.RR&DR.SR TECHNICAL UNIVERSITYPage 10
SUBTRACTOR:
It amplifies the difference between the two input voltages by Rf/Rin, which is the
overall gain for the circuit. Note that the ability of this amplifier to effectively take the
difference between two signals depends on the fact that it uses two pairs of identical
resistances. Also note that the signal that is subtracted goes into the negative input to the op-
amp. Be careful with the term differential. In spite of its similarity to the term
differentiation, the differential amplifier does not differentiate its input.
The circuit in the following Figure 12.2 is a differential amplifier, also called a
difference amplifier.
Figure 2.2
Circuit Diagram for Sub tractor
Its behavior is governed by the following equation:
U4ECB10 LINEAR INTEGRATED CIRCUITS LAB
VEL TECHDR.RR&DR.SR TECHNICAL UNIVERSITYPage 11
CIRCUIT DIAGRAM:
ADDER:
SUBTRACTOR:
U4ECB10 LINEAR INTEGRATED CIRCUITS LAB
VEL TECHDR.RR&DR.SR TECHNICAL UNIVERSITYPage 12
APPARATUS REQUIRED:
S.No Name of the Apparatus Range Quantity1. Function Generator 3 MHz 22. CRO 30 MHz 13. Dual RPS 0 30 V 14. Op-Amp IC 741 15. Bread Board - 16. Resistors 2K 47. Connecting wires and probes As required -
PROCEDURE:
1. Connections are given as per the circuit diagram.
2. + Vcc and - Vcc supply is given to the power supply terminal of the Op-Amp IC.
3. The output voltage is obtained in the CRO and the input and output voltage waveforms
are plotted in a graph sheet.
RESULT:
The Adder and Subtractor circuits are constructed and their functions are verified.
VIVA QUESTIONS:
1. Is it possible to construct an adder in non-inverting mode? How?
2. Why same values of resistors are used in the circuits?
3. Can you construct an Adder just with resistors?
4. Is your subtractor same as Differential amplifier? How?
U4ECB10 LINEAR INTEGRATED CIRCUITS LAB
VEL TECHDR.RR&DR.SR TECHNICAL UNIVERSITYPage 13
EXP NO:2 DIFFERENTIATOR AND INTEGRATOR
AIM:
To design a Integrator and Differentiator circuit for the given specifications using Op-Amp IC 741.DIFFERENTIATORTHEORY:
The differentiator circuit performs the mathematical operation of differentiation. The differentiator may be constructed from a basic inverting amplifier if an input resistor R1
is replaced by a capacitor C1.The expression for the output voltage is given as,
Vo = - Rf C1 (dVi/dt)
Here the negative sign indicates that the output voltage is 1800out of phase with the input signal.
A resistor Rcomp = Rf is normally connected to the non-inverting input terminal of the op-amp to compensate for the input bias current. A workable differentiator can be
designed by implementing the following steps:
1. Select fa equal to the highest frequency of the input signal to be differentiated. Then,
assuming a value of C1< 1 F, calculate the value of Rf.
2. Choose fb= 20 fa and calculate the values of R1 and Cf so that R1C1 = Rf Cf.
The differentiator is most commonly used in waveshaping circuits to detect high frequency components in an input signal and also as a rateofchange detector in FM
modulators.
U4ECB10 LINEAR INTEGRATED CIRCUITS LAB
VEL TECHDR.RR&DR.SR TECHNICAL UNIVERSITYPage 14
DIFFERENTIATOR DESIGN:
[To design a differentiator circuit to differentiate an input signal that varies in frequency from 10
Hz to about 1 KHz. If a sine wave of 1 V peak to peak at 1000Hz is applied to the
differentiator, draw its output waveform.]
Given
fa= 1 KHz
We know the frequency at which the gain is 0 dB, fa = 1 / (2 Rf C1)Let us assume C1 = 0.1 F ; then
Rf = _________
Since fb = 20 fa, fb = 20 KHz
We know that the gain limiting frequency fb = 1 / (2 R1 C1)Hence R1 = _________
Also since R1C1 = Rf Cf ; Cf = _________
Given VP = 1 V and f = 1000 Hz, the input voltage is Vi = Vp sin tWe know = 2f
Hence VO= - RF C1 (dvi/dt)
= - 0.94 cos tDesign the Differentiator for fallowing specifications.
1. An input signal that varies in frequency from 10 Hz to about 750Hz. If a sine wave of 3
V peak at 750Hz is applied to the differentiator, draw its output waveform.
2. An input signal that varies in frequency from 10 Hz to about 500Hz. If a sine wave of 2
V peak at 500Hz is applied to the differentiator, draw its output waveform.
3. An input signal that varies in frequency from 10 Hz to about 800Hz. If a sine wave of 3
V peak at 800Hz is applied to the differentiator, draw its output waveform.
U4ECB10 LINEAR INTEGRATED CIRCUITS LAB
VEL TECHDR.RR&DR.SR TECHNICAL UNIVERSITYPage 15
CIRCUIT DIAGRAM:
Figure 2.1Differentiator Connection Diagram
APPARATUS REQUIRED:
S.No Name of the Apparatus Range Quantity1. Function Generator 3 MHz 12. CRO 30 MHz 13. Dual RPS 0 30 V 14. Op-Amp IC 741 15. Bread Board 16. Resistors As per design As per design7. Capacitors As per design As per design8. Connecting wires and probes As required As required
PROCEDURE:
1. Connections are given as per the circuit diagram.
2. + Vcc and - Vcc supply is given to the power supply terminal of the Op-Amp IC.
3. By adjusting the amplitude and frequency knobs of the function generator, appropriate
input voltage is applied to the inverting input terminal of the Op-Amp.
U4ECB10 LINEAR INTEGRATED CIRCUITS LAB
VEL TECHDR.RR&DR.SR TECHNICAL UNIVERSITYPage 16
4. The output voltage is obtained in the CRO and the input and output voltage waveforms
are plotted in a graph sheet.
INTEGRATORTHEORY:
A circuit in which the output voltage waveform is the integral of the input voltage waveform is the integrator.
Such a circuit is obtained by using a basic inverting amplifier configuration if the feedback resistor Rfis replaced by a capacitor Cf .The expression for the output voltage is
given as,
Vo = - (1/RfC1 ) Vi dt
Here the negative sign indicates that the output voltage is 180 0 out of phase with the input
signal.
Normally between fa and fb the circuit acts as an integrator. Generally, the value of fa< fb . The input signal will be integrated properly if the Time period T of the signal is larger
than or equal to Rf Cf . That is,
T Rf CfINTEGRATORDESIGN:
In the circuit of figure 2.2.(a),R1 Cf =1 second, and the input is a step (dc) voltage,2V. Determine the output voltage.
Let the input function is constant beging at t=0 second ,0
U4ECB10 LINEAR INTEGRATED CIRCUITS LAB
VEL TECHDR.RR&DR.SR TECHNICAL UNIVERSITYPage 17
CIRCUIT DIAGRAM: INTEGRATOR
Figure 2.2Integrator Connection Diagram
APPARATUS REQUIRED:
S.No Name of the Apparatus Range Quantity1. Function Generator 3 MHz 12. CRO 30 MHz 13. Dual RPS 0 30 V 14. Op-Amp IC 741 15. Bread Board 16. Resistors 10K 17. Capacitors 0.1f 18. Connecting wires and probes As required As required
PROCEDURE:
1. Connections are given as per the circuit diagram.
2. + Vcc and - Vcc supply is given to the power supply terminal of the Op-Amp IC.
U4ECB10 LINEAR INTEGRATED CIRCUITS LAB
VEL TECHDR.RR&DR.SR TECHNICAL UNIVERSITYPage 18
3. By adjusting the amplitude and frequency knobs of the function generator, appropriate
input voltage is applied to the inverting input terminal of the Op-Amp.
4. The output voltage is obtained in the CRO and the input and output voltage waveforms
are plotted in a graph sheet.
OBSERVATION TABLE: (Differentiator)
S.No Input Output
1.Amplitude
( No. of div x Volts per div )
2.Time period
( No. of div x Time per div )
OBSERVATION TABLE:(Integrator)
S.No Input Output
1. Amplitude( No. of div x Volts per div )
2. Time period( No. of div x Time per div )
MODEL GRAPH: DIFFERENTIATOR
U4ECB10 LINEAR INTEGRATED CIRCUITS LAB
VEL TECHDR.RR&DR.SR TECHNICAL UNIVERSITYPage 19
Figure 2.3
Figure 2.4
MODEL GRAPH
Figure 2.2(b)
Input and output wave form
U4ECB10 LINEAR INTEGRATED CIRCUITS LAB
VEL TECHDR.RR&DR.SR TECHNICAL UNIVERSITYPage 20
VIVA QUESTIONS:
1. What is integrator?
2. Write the disadvantages of ideal integrator?
3. What is differentiator?
4. What will happen if R1 not present?
5. Write the application of differentiator?
6. Why compensation resistance is needed in differentiator.?
7. Why integrators are preferred over differentiators in analog comparators?
U4ECB10 LINEAR INTEGRATED CIRCUITS LAB
VEL TECHDR.RR&DR.SR TECHNICAL UNIVERSITYPage 21
EXP NO: 3 DIFFRENTIAL AMPLIFIER& SCHMITT TRIGGER
AIM:
To design and test the operation of Differential amplifier and Schmitt trigger.
DIFFRENTIAL AMPLIFIER
THEORY:
A Circuit that amplifies the difference between two signals is called a differential amplifier.
This type of amplifier is very useful in instrumentation circuits. For differential amplifier, though the circuit is not symmetric, but because of the
mismatch, the gain at the output with respect to positive terminal is slightly different in
magnitude to that of negative terminal.
So even with the same voltage applied to both the inputs, the output is not zero.DIFFRENTIAL AMPLIFIER DESIGN:
Gain = 100, & Let R1 = 1 K
AD = R2 / R1
So R2 = AD * R 1
R2 = 100 * 1K = 100K.
1. Design the Differentiator amplifier having gain of 40.
2. Design the Differentiator amplifier having gain of 20.
3. Design the Differentiator amplifier having gain of 80.
CIRCUIT DIAGRAM
U4ECB10 LINEAR INTEGRATED CIRCUITS LAB
VEL TECHDR.RR&DR.SR TECHNICAL UNIVERSITYPage 22
Figure 3.1
Differential Amplifier connection diagram
APPARATUS REQUIRED:
S.No Name of the Apparatus Range Quantity1. Function Generator 3 MHz 22. CRO 30 MHz 13. Dual RPS 0 30 V 14. Op-Amp IC 741 15. Bread Board 16. Resistors As per design As per design7. Connecting wires and probes As required As required
PROCEDURE:
1. Connections are given as per the circuit diagram.
2. Set the input Voltages V1 = 50mV & V2 =40mV.
3. Note down the Output Voltage
4. Vary the input Voltages and note down the output voltages.
TABULATION:
SL
NO
VI(V) V2(V) VO(V)
U4ECB10 LINEAR INTEGRATED CIRCUITS LAB
VEL TECHDR.RR&DR.SR TECHNICAL UNIVERSITYPage 23
SCHMITT TRIGGERTHEORY:
The Schmitt trigger is a comparator with positive feedback. It converts slowly varying waveforms into square wave.
The input voltage is applied to the inverting terminal and the feedback circuit is connected to the non-inverting terminal. The input voltage triggers the output every
time it exceeds certain voltage levels.
These voltage levels are called as upper threshold voltage (VUT) and lower threshold voltage (VLT). As long as the input voltage is less than VUT the output remains at +Vsat.
When Vi is just greater than VUT, the output regenerative switches to - Vsat and remains at this level. When the input voltage becomes lesser than VLT, the output switches from -
Vsatto + Vsat.
FORMULA:
)(21
2satLT VRR
RV
SCHMITT TRIGGER DESIGN:
Vsat=0.9Vcc=0.9X12V=10.8V
To find R1 and R2 values
Choose R2 = 1K
12
1 UT
sat
V
V
R
R
R1 = 47K for VUT = 0.225V
satUT VRR
RV
212
U4ECB10 LINEAR INTEGRATED CIRCUITS LAB
VEL TECHDR.RR&DR.SR TECHNICAL UNIVERSITYPage 24
1.Design the Schmitt Trigger R1=100,R2=56K,Vin=1V.Determine the threshold voltages.
2 Design the Schmitt Trigger R1=50,R2=22K,Vin=1V.Determine the threshold voltages.
CIRCUIT DIAGRAM:
Figure 3.2Schmitt Triger
PROCEDURE:
1. Connect the circuit as per the circuit diagram.
2. Set the input voltage as 1Vpp.
3. Measure the amplitude of the output signal.
4. Note down the upper and lower threshold voltages by superimposing the square wave
on the input sine wave.
5. Plot the input and output waveforms.
TABULATION: Schmitt Triger
Waveform Nature Amplitudes(Volts) Time period(ms)
Input waveform Sine wave
Output waveform Square wave
U4ECB10 LINEAR INTEGRATED CIRCUITS LAB
VEL TECHDR.RR&DR.SR TECHNICAL UNIVERSITYPage 25
MODEL GRAPH:
Figure 3.3 Schmitt trigger output graph
RESULT:
VIVA QUESTIONS:
1. What are the types of comparators?
2. What is the limiting factor of op-amp comparator?
3. Mention some applications of op-amp comparator.
4. Explain the operation of zero crossing comparator.
5. Which feedback is employed in Schmitt trigger?
6. What is the other name for Schmitt trigger?
7. What is hysteresis?
8. What parameters determine the hysteresis?
9. Give the applications of Schmitt trigger.
10. What is the use of Differential amplifier?
11. Define CMRR.
12. What happens when you apply same voltages?
U4ECB10 LINEAR INTEGRATED CIRCUITS LAB
VEL TECHDR.RR&DR.SR TECHNICAL UNIVERSITYPage 26
EXP NO: 4 WEIN BRIDGE and PHASE SHIFT OSCILLATOR USING OP-AMP 741
AIM:To design the Wien Bridge and Phase shift oscillator using OP-AMP IC for the given specification.WEIN BRIDGETHEORY:
The Wien bridge oscillator is the most commonly used audio frequency oscillator
because of its simplicity and stability. Figure shows the Wien bridge oscillator in which
Wien bridge circuit is connected between the amplifiers input terminals and the output
terminal. The bridge has a series RC network in one arm and a parallel RC network in the
adjoining arm. In the remaining two arms of the bridge, resistors R1 and Rf are
connected.
The phase angle criterion for oscillation is that the total phase shift around the circuit
must be 00. This condition occurs only when the bridge is balanced. The frequency of
oscillation fois exactly the resonant frequency of the balanced Wien bridge and is given
by, fo = 1/(2 R C )WEIN BRIDGE
DESIGN
fo=1kHz
fo = 1/(2 R C ) and Rf = 2R1Choose C=0.05 F
So R= 1/ (2 10000.05 F) =3.1K
Take R1=10R=30 K and
Rf=2R1= 60 K (use100 K pot to get the exact value by varying the pot)
1. Design the oscillator that f0 =965Hz
U4ECB10 LINEAR INTEGRATED CIRCUITS LAB
VEL TECHDR.RR&DR.SR TECHNICAL UNIVERSITYPage 27
CIRCUIT DIAGRAM
Figure 4.1
Wien Bridge Oscillator
APPARATUS REQUIRED:S.No Name of the Apparatus Range Quantity
1. Function Generator 3 MHz 22. CRO 30 MHz 13. Dual RPS 0 30 V 14. Op-Amp IC 741 15. Bread Board 16. Resistors As per design As per design7. Capacitors As per design As per design8. Connecting wires and probes As required As required
PROCEDURE:
1. Construct the circuit with the values obtained in the design.
2. Observe the output wave form on an Oscilloscope.
3. Measure the frequency of oscillator and voltage amplitude.
Model Graph:
U4ECB10
VEL TECHDR.RR&DR.SR TECHNICAL UNIVERSITY
Figure 4.2
Wein bridge Output graph
phase-shift oscillator
THEORY:A phase-shift oscillator is a linear
It consists of an inverting amplifie
back to its input through a phase
feedback network 'shifts' the phase
frequency to give positive feedback
audio oscillators.
CIRCUIT DIAGRAM:
U4ECB10 LINEAR INTEGRATED CIRCUITS LAB
VEL TECHDR.RR&DR.SR TECHNICAL UNIVERSITY
Output graph
linear electronic oscillator circuit that produces a sine wave
inverting amplifier element such as a transistor or op amp with its output
phase-shift network consisting of resistors and
phase of the amplifier output by 180 degrees at the oscillation
positive feedback. Phase-shift oscillators are often used at audio frequency
Figure 4.3
LINEAR INTEGRATED CIRCUITS LAB
Page 28
sine wave output.
with its output fed
and capacitors. The
of the amplifier output by 180 degrees at the oscillation
udio frequency as
U4ECB10 LINEAR INTEGRATED CIRCUITS LAB
VEL TECHDR.RR&DR.SR TECHNICAL UNIVERSITYPage 29
Phase oscillator
phase-shift oscillator Design:Let C=0.1f,ThenR= (0.065)/(200*0.1f)=3.25KTo prevent the loading of amplifier R1>10R,therefore R1=10R=33K;Rf=29R1Rf=29(33)=957KPROCEDURE:
1. Construct the circuit with the values obtained in the design.
2. Observe the output wave form on an Oscilloscope.
3. Measure the frequency of oscillator and voltage amplitude.
Model Graph:
Figure 4.4
RC Phase shift oscillator output graph
TABULATION:
AMPLITUDE (V) TIME PERIOD FREQUENCY
U4ECB10 LINEAR INTEGRATED CIRCUITS LAB
VEL TECHDR.RR&DR.SR TECHNICAL UNIVERSITYPage 30
RESULT:
VIVA QUESTIONS:
1. What happens at the output if Rf is changed?
2. How is phase shift oscillator different from RC phase shift oscillator?
3. What are the applications of phase shift oscillator?
4. What happens at the output if Rf is changed?
5. How is Wein bridge oscillator different from RC phase shift oscillator?
6. What are the applications of Wein bridge oscillator?
7. What is the condition for the bridge to be balanced?
U4ECB10 LINEAR INTEGRATED CIRCUITS LAB
VEL TECHDR.RR&DR.SR TECHNICAL UNIVERSITYPage 31
EXP NO:5 ASTABLE & MONOSTABLE MULTIVIBRATORS USING OP-AMP
AIM:To design and construct an Astable and Monostable multivibrators using IC Operational
amplifier 741.
ASTABLE MULTIVIBRATORTHEORY:
Multivibrators are group of regenerative circuits. They are widely used in timing applications.
An electronic circuit that generates square waves (or other non-sinusoidal such a rectangular, saw tooth waves) is known as a multivibrator.
A multivibrator is a switching circuit, which depends for operation on positive feedback. It is basically a two-stage amplifier with output of one feedback to the input of the
other.
Multivibrators are classified as Bistable multivibrator Monostable multivibrator Astable multivibrator
ASTABLE MULTIVIBRATOR:
Astable circuits are used to generate square waves. It is also known as free running multivibrator.
The circuit has two quasi stable states (no stable state). Thus, there is an oscillation between two states and no external signals are required to produce the change in state.
OPERATION:
In a free running mode, the two states of the multivibrator are momentarily stable and the circuit switches respectively between these two states.
U4ECB10 LINEAR INTEGRATED CIRCUITS LAB
VEL TECHDR.RR&DR.SR TECHNICAL UNIVERSITYPage 32
In one state the amplifier output goes to positive saturation level while in the other state it goes into negative saturation. The amplifier output is thus a square wave; the
period of a square wave is determined by the time constant R & C.
ASTABLE MULTIVIBRATOR DESIGN:
Feedback factor () = R2/(R1+R2)
Time period of the square wave T =2RC ln[(1+)/(1-)]
Let R1 =R2 10K then =0.5
Assume C = 0.1F
For a time period of 1ms
T= 2RC ln 3
Rf = 4.55K
Component values:
R1 =10K R2 = 10K
Rf = 4.55KC = 0.1F
1.Design the Astable multivibrartor ,so that f0 =1kHz.
CIRCUIT DIAGRAM:
Figure 5.1ASTABLE MULTIVIBRATOR USING OP AMP Circuit Diagram
U4ECB10 LINEAR INTEGRATED CIRCUITS LAB
VEL TECHDR.RR&DR.SR TECHNICAL UNIVERSITYPage 33
APPARATUS REQUIRED:
S.No Name of the Apparatus Range Quantity1. Function Generator 3 MHz 22. CRO 30 MHz 13. Dual RPS 0 30 V 14. Op-Amp IC 741 15. Bread Board 16. Resistors As per design As per design7. Capacitors As per design As per design8. Connecting wires and probes As required As required
PROCEDURE:
1. Get the required components and check the condition of them.
2. Connect the circuit as per the circuit diagram.
3. Switch on the power supply and look at the output with CRO.
4. Measure the width and time period of the output waveform.
5. Look at the voltage across the capacitor, an exponentially rising and falling wave
between 5V and 10V is noted.
6. After completing the experiments, reduce the supply to zero potential and disconnect
the circuit diagram.
OBSERVATION TABLE:
Parameters Amplitude(Volts) Time period(ms)
Output voltage
Capacitor voltage
MODEL GRAPH: ASTABLE MULTIVIBRATOR
U4ECB10 LINEAR INTEGRATED CIRCUITS LAB
VEL TECHDR.RR&DR.SR TECHNICAL UNIVERSITYPage 34
Figure 5.2MONOSTABLE
THEORY: It is also known as one shot multivibrator. It generates a single pulse of specified duration in response to each external trigger
signal. A mono-stable multivibrator exits only one stable state.
Application of a trigger causes a change to the quasistable state. The circuit remains in a quasistable state for a fixed interval of time and then reverts to
its original stable state.
An internal trigger signal is generated which produces the transition to the stable state. Usually, the charging and discharging of a capacitor provides this internal trigger signal.
MONOSTABLE DESIGN:
SPECIFICATION:
Vcc = 10V, V (Sat) = 10V, pulse width T = 1msec
1. To find R1 and R2
= R1 R1+R2
Assume R1=R2, so = 0.5
2. To find charging period of capacitor,
U4ECB10 LINEAR INTEGRATED CIRCUITS LAB
VEL TECHDR.RR&DR.SR TECHNICAL UNIVERSITYPage 35
T = R*C ln (Vsat / Vsat-Vt)
We know that,
Vt = Vsat* R2 / R1+R2 where Vsat = 12V and Substitute Vt in T, we get
T = R*C ln (1+R2 / R1) Take R2 = R1=10k.
T = R * C (0.69)
T = 0.69 RC
Choose T = 1ms, & C = 0.1f, find out the value of R, Therefore R = 12kohms.
CIRCUIT DIAGRAM:
Figure 5.3
Monostable Multivibrator
PROCEDURE:
1. Get the required components and check the condition of them.
2. Connect the circuit as per the circuit diagram.
3. Switch on the power supply and look at the output with CRO.
4. Measure the width and time period of the output waveform.
U4ECB10 LINEAR INTEGRATED CIRCUITS LAB
VEL TECHDR.RR&DR.SR TECHNICAL UNIVERSITYPage 36
OBSERVATION TABLE:
Parameters Amplitude(Volts) Time period(ms)
Output voltage
Capacitor voltage
MODEL GRAPH:
Figure 5.4Monostable multivibrator Output graphs
RESULT:
VIVA QUESTIONS:
1. What is a multivibrator?
2. Give the principle of operation of Multivibrators?
3. What is another name for astable multivibrator?
4. What do you mean by astable multivibrator?
5. Differentiate astable and monostable multivibrator?
6. Give the application of astable multivibrator.
U4ECB10 LINEAR INTEGRATED CIRCUITS LAB
VEL TECHDR.RR&DR.SR TECHNICAL UNIVERSITYPage 37
U4ECB10 LINEAR INTEGRATED CIRCUITS LAB
VEL TECHDR.RR&DR.SR TECHNICAL UNIVERSITYPage 38
EXP NO: 6 SECOND ORDER ACTIVE LOW PASS HIGH PASS AND BAND PASS FILTER
AIM:To design a second order low pass, high pass and band pass filter and also to
determine its frequency response using IC 741.
THEORY:
LOWPASS FILTER:
An improved filter response can be obtained by using a second order active filter. A second
order filter consists of two RC pairs and has a roll-off rate of -40 dB/decade. A general second
order filter (Sallen Kay filter) is used to analyze different LP, HP, BP and BSF.
HIGHPASS FILTER:
The high pass filter is the complement of the low pass filter. Thus the high pass filter canbe
obtained by interchanging R and C in the circuit of low pass configuration. A high pass
filterallows only frequencies above a certain bread point to pass through and it terminates the
lowfrequency components. The range of frequencies beyond its lower cut off frequency fL is
calledstop band.
BANDPASS FILTER:
The BPF is the combination of high and low pass filters and this allows a specified range of
frequencies to pass through. It has two stop bands in range of frequencies between 0 to fL
andbeyond fH. The band b/w fL and fH is called pass band. Hence its bandwidth is (fL-fH). This
filter has a maximum gain at the resonant frequency (fr) which is defined as
U4ECB10 LINEAR INTEGRATED CIRCUITS LAB
VEL TECHDR.RR&DR.SR TECHNICAL UNIVERSITYPage 39
DESIGN:Given: fH = 1 KHz = 1/ (2RC) Let C = 0.1 F, R = 1.6 K
For n = 2, (damping factor) = 1.414,Pass band gain = Ao = 3 - =3 1.414 = 1.586.Transfer function of second order Butterworth LPF as:
1.586
H(s) = ---------------------------
S2 + 1.414 s + 1
Now Ao = 1 + (Rf / R1) = 1.586 = 1 + 0.586
Let Ri = 10 K, then Rf = 5.86 K1.Design the second order high pass filter at a cut off frequency of 1khz with passband gain of 2.
2.Design a wideband pass filter with fL =200Hz,fH =1kHz and pass band gain=4
3.Design a second order low pass filter at high cutoff frequency of 1kHz.
CIRCUIT DIAGRAM:
LPF:
Figure 6.1 Low pass filter connection diagram
U4ECB10 LINEAR INTEGRATED CIRCUITS LAB
VEL TECHDR.RR&DR.SR TECHNICAL UNIVERSITYPage 40
HPF:
Figure 6.2High pass filter connection Diagram
BPF:
Figure 6.3Band pass filter connection Diagram
U4ECB10 LINEAR INTEGRATED CIRCUITS LAB
VEL TECHDR.RR&DR.SR TECHNICAL UNIVERSITYPage 41
APPARATUS REQUIRED:S.No Name of the Apparatus Range Quantity
1. Function Generator 3 MHz 22. CRO 30 MHz 13. Dual RPS 0 30 V 14. Op-Amp IC 741 15. Bread Board 16. Resistors As per design As per design7. Capacitors As per design As per design8. Connecting wires and probes As required As required
PROCEDURE:
1. The connections are made as shown in the circuit diagram.
2. The signal which has to be made sine is applied to the RC filter pair circuit with the non-
inverting terminal.
3. The supply voltage is switched ON and the o/p voltages are recorded through CRO by
varying different frequencies and tabulate the readings.
4. Calculating Gain through the formula and plotting the frequency response
characteristics using Semi-log graph sheet and finding out the 3 dB line for fc.
MODEL GRAPH:
LPF:
Frequency Response Characteristics: (Use Semi log Graph):
Gain - 3 dB IndB
fc = 1KHz
Frequency (Hz) Figure 6.4
U4ECB10 LINEAR INTEGRATED CIRCUITS LAB
VEL TECHDR.RR&DR.SR TECHNICAL UNIVERSITYPage 42
HPF:
Figure 6.5
BPF:
Figure 6.6
U4ECB10 LINEAR INTEGRATED CIRCUITS LAB
VEL TECHDR.RR&DR.SR TECHNICAL UNIVERSITYPage 43
OBSERVATION TABLE:
VIN = Volts
S.No. FREQUNCY Hz
O/P voltage(VO )Volts Av=20 log Vo/Vi dB
RESULT:
VIVA QUESTIONS:
1. What is pass band and stop band?
2. What has to be done in the circuit, if you want your filter to exactly follow the cut-off
frequency?
3. Can a Band pass filter be constructed just by coupling a low pass filter and high pass
filter, how?
4. Why do we draw a line at 3 dB below the peak gain to calculate the pass band of a filter?
U4ECB10 LINEAR INTEGRATED CIRCUITS LAB
VEL TECHDR.RR&DR.SR TECHNICAL UNIVERSITYPage 44
EXP NO: 7 ANALOG TO DIGITAL AND DIGITAL TO ANLOG CONVERTER
AIM
To design and test a 4 bit Successive approximation type A/D and 3 bit R-2R ladder D/A
converter
THEORY
The analog to digital converter is normally required at the input of a digital system for
the measurement or control of analog quantities. In A/D converters, the input is an analog
voltage and the output is a digital code. A/D converters are more complex and time consuming
than D/A converters.
A/D converters can be designed with or without the use of D/A converters as part of
their circuitry. The commonly used types of A/D converters are
(a) Successive- approximation converter
(b) Counting or digital ramp converter.
PROCEDURE
1. Make the connections as per the circuit diagram.
2. Switch on the power supply.
3. Give voltage to the IC.
4. Note the sequence of LED blinking.
APPARATUS REQURIED
SL. No Apparatus Range Qty
1. Operational amplifier IC 741 4
2. RPS (0-30V) 1
3. Resistors 1k, 20k14
U4ECB10 LINEAR INTEGRATED CIRCUITS LAB
VEL TECHDR.RR&DR.SR TECHNICAL UNIVERSITYPage 45
CIRCUIT DIAGRAM
Figure 7.1
Schematic Diagram for A/D converter
APPARATUS REQUIRED:
S.No Apparatus Range Qty
4. Operational amplifier IC 741 1
5. RPS (0-30V) 2
6. Resistors 1.1k, 2.2K, 4.4K, 8.8K20k, 10kEach 1Each 4
7. Voltmeter (0-10V)MC 1
U4ECB10 LINEAR INTEGRATED CIRCUITS LAB
VEL TECHDR.RR&DR.SR TECHNICAL UNIVERSITYPage 46
D/A
THEORY
The decoder is one, which converts the digital information from the digital processing
unit to analog output. We call the digital to analog converter or in short D/A converter. The D/A
converter decode the digital information to analog form.
The input to a digital to analog converter is a binary signal available in parallel form.
These digital signals are available at the output of the latches or registers and correspond to
logic 0 and logic 1. These voltages are not directly applied to the converter but are used to
operate digitally controlled switches. The switch is put into two positions depending on the
digital signal 1 or 0, which connect the fixed voltages. Let us suppose we want to convert the
binary form the processing unit to a 0 to 3 volts output. We must first set up a truth table for all
possible situations. The following table shows four inputs into a D/A converter.
PROCRDURE
1. Make the connections as per the circuit diagram.
2. Switch ON the power supply.
3. Set the digital input by using switches SW1 to SW8
4. The output analog equivalent for the digital data can be viewed from pin6
5. Verify the analog output theoretically by sing the formula given below
6. Repeat the steps 4 to 6 for different digital inputs
FORMULA USED
Vanalog = VR[(b1. 21) + (b. 2) + (b3. 23) + + (bn. 2n)]Where,
Vanalog = analog input voltage
VR = reference input voltage (4.99 volts)
b1,b2 bn = n-bit digital outputs
b1 is the MSB of the digital data
bn is the LSB of the digital data
U4ECB10 LINEAR INTEGRATED CIRCUITS LAB
VEL TECHDR.RR&DR.SR TECHNICAL UNIVERSITYPage 47
CIRCUIT DIAGRAM
Figure 7.2
D/A Converter circuit diagram
RESULT
Thus the R-2R ladder DAC and a binary weighted DAC has been tested for various digital inputs.
U4ECB10 LINEAR INTEGRATED CIRCUITS LAB
VEL TECHDR.RR&DR.SR TECHNICAL UNIVERSITYPage 48
EXP NO: 8 ASTABLE AND MONOSTABLE MULTIVIBRATOR
USING NE555 TIMER
AIM:To design, construct and test the astable multivibrator and monostable multivibrator using
IC 555.
THEORY:
IC555 is a combination of linear comparators and digital flip flops. The output of comparators is used to set/reset the FF.
The output FF circuit is brought out through an amplifier stage. The FF output is also give to a transistor to discharge a timing capacitor.
The 555 timer has two basic operational modes: astable and monostable.
Astable operation:
When IC555 is to be configured as an astable multivibrator, both the trigger and threshold inputs (pins 2 and 6) to the two comparators are connected together and to
the external capacitor.
The capacitor charges toward the supply voltage through the two resistors, R1 and R2. The discharge pin (7) connected to the internal transistor is connected to the junction of
those two resistors.
Monostable operation:
The trigger input is initially high (about 1/3 of +V). When a negative-going trigger pulse is applied to the trigger input, the threshold on the lower comparator is exceeded.
The lower comparator, therefore, sets the flip-flop. That causes T1 to cut off, acting as an open circuit. The setting of the flip-flop also causes a positive-going output level
which is the beginning of the output timing pulse.
The capacitor now begins to charge through the external resistor. As soon as the charge on the capacitor equal 2/3 of the supply voltage, the upper comparator triggers and
resets the control flip-flop.
U4ECB10 LINEAR INTEGRATED CIRCUITS LAB
VEL TECHDR.RR&DR.SR TECHNICAL UNIVERSITYPage 49
That terminates the output pulse which switches back to zero. At this time, T1 again conducts thereby discharging the capacitor.
Whenever a trigger pulse is applied to the input, the 555 will generate its single-duration output pulse. Depending upon the values of external resistance and
capacitance used, the output timing pulse may be adjusted and the duration of the
output pulse is approximately equal to T = 1.1 x R x C
DESIGN:
ASTABLE MULTIVIBRATOR:
T= 0.693(RA+2RB) C
0.7 (RA+2RB) CLet RA=RB=R
T= 2.1 RC
Assume R=10K and C = 0.1F for T=2.1msecAlso TON = 0.7(RA+RB)C =1.4msec
TOFF = 0.7RBC=0.7msec
MONOSTABLE MULTIVIBRATOR:
TON= 1.1 RC
Assume R=10K and C=0.1F for TON=1.1msecCIRCUIT DIAGRAM
ASTABLE MULTIVIBRATOR
Figure 8.1
U4ECB10 LINEAR INTEGRATED CIRCUITS LAB
VEL TECHDR.RR&DR.SR TECHNICAL UNIVERSITYPage 50
MONOSTABLE MULTIVIBRATOR
Figure 8.2APPARATUS REQUIRED:
S.No Name of the Apparatus Range Quantity1. Function Generator 3 MHz 12. CRO 30 MHz 13. Dual RPS 0 30 V 14. Op-Amp IC 741 15. Bread Board 16. Resistors As per design As per design7. Capacitors As per design As per design8. Connecting wires and probes As required As required
PROCEDURE:
1. Connect the circuit as per the circuit diagram.
2. Measure the width and time period of the output waveform.
3. Observe the voltage across the capacitor and note down the amplitude.
4. Tabulate the readings
5. Plot the graph
U4ECB10 LINEAR INTEGRATED CIRCUITS LAB
VEL TECHDR.RR&DR.SR TECHNICAL UNIVERSITYPage 51
TABULATION:
ASTABLE MULTIVIBRATOR :
PARAMETERS AMPLITUDE(VOLTS) TIME PERIOD(MS)
OUTPUT VOLTAGE
CAPACITOR VOLTAGE
MONOSTABLE MULTIVIBRATOR :
PARAMETERS AMPLITUDE(VOLTS) TIME PERIOD(MS)
OUTPUT VOLTAGE
CAPACITOR VOLTAGE
MODEL GRAPH:
ASTABLE MULTIVIBRATOR
Figure 8.3
U4ECB10 LINEAR INTEGRATED CIRCUITS LAB
VEL TECHDR.RR&DR.SR TECHNICAL UNIVERSITYPage 52
MONOSTABLE MULTIVIBRATOR
Figure 8.4
RESULT:Thus the design of Astable multivibrator and Monostable multivibrator was done and
output was verified.
VIVA QUESTIONS:
1. What are the modes of operation of 555 timers?
2. Explain the function of reset.
3. Define duty cycle.
4. Mention the applications of IC555.
5. Give the methods for obtaining symmetrical square wave.
6. What is the other name for monostable multivibrator?
7. Explain the operation of IC555 in astable mode.
8. Explain the operation of IC555 in monostable mode.
9. Why negative pulse is used as trigger?
10. What is the charging time for capacitor in monostable mode?
U4ECB10 LINEAR INTEGRATED CIRCUITS LAB
VEL TECHDR.RR&DR.SR TECHNICAL UNIVERSITYPage 53
EXP.NO:9 FREQUENCY MULTIPLIER USING PLL IC
AIM:
To study the operation of NE 565 PLL as a frequency multiplier.
THEORY:
Figure shows the block diagram of a frequency multiplier using the 565 PLL. The frequency
counter is inserted between the VCO and the phase comparator. Since the output of the divider
is locked to the input frequency fIN, the VCO is actually running at a multiple of the input
frequency.
The desired amount of multiplication can be obtained by selecting a proper divide by N
network, where N is an integer. For example, to obtain the output frequency fOUT =5 fIN, a divide
by N = 5 network is needed. The 4 bit binary counter (7490) is configured as a divide by 5
circuit. The transistor Q is used as a driver stage to increase the driving capability of the NE 565.
C3 is used to eliminate possible oscillation. C2 should be large enough to stabilize the VCO
frequency.
BLOCK DIAGRAM:
Figure 9.1
Block Diaram for PLL
U4ECB10 LINEAR INTEGRATED CIRCUITS LAB
VEL TECHDR.RR&DR.SR TECHNICAL UNIVERSITYPage 54
CIRCUIT DIAGRAM:
Figure 9.2
U4ECB10 LINEAR INTEGRATED CIRCUITS LAB
VEL TECHDR.RR&DR.SR TECHNICAL UNIVERSITYPage 55
APPARATUS REQUIRED:
S.NO ITEM RANGE QTY
1 IC IC NE565IC 7490
11
2 Resistors As required
3 Capacitor As required4 CRO 30MHz 1
5 RPS DUAL(0-30) V 1
6 Transistor 2N3391 1
7 Bread Board - 1
8. Connecting wires As required
PROCEDURE:
1. Connect the circuit as shown in figure.
2. The free running frequency fOUT of VCO is varied by adjusting R1 and C1 and the output
frequency is determined and it should be 5 times the input frequency.
3. Determine the output frequency for different input frequency of 1 KHz and 1.5 KHz.
TABULATION:
INPUT OUTPUT
AMPLITUDE FREQUENCY AMPLITUDE FREQUENCY
RESULT:
The frequency multiplier using PLL principle is studied and the output waveform is observed.
U4ECB10 LINEAR INTEGRATED CIRCUITS LAB
VEL TECHDR.RR&DR.SR TECHNICAL UNIVERSITYPage 56
VIVA QUESTIONS:
1. What are the other applications of PLL?
2. Explain the working of the transistor 2N3391?
3. What is VCO? Explain its working.
4. What are the characteristics of PLL?
5. What is IC 7490?
U4ECB10 LINEAR INTEGRATED CIRCUITS LAB
VEL TECHDR.RR&DR.SR TECHNICAL UNIVERSITYPage 57
EXP NO:10 DESIGN OF INSTRUMENTATION AMPLIFIER
AIM:To design an Instrumentation Amplifie for the given specifications using Op-Amp IC 741.
THEORY:
An instrumentationamplifier is a type of differential amplifier that has been outfitted with input
buffers, which eliminate the need for input impedance matching and thus make the amplifier
particularly suitable for use in measurement and test equipment.
Although the instrumentation amplifier is usually shown schematically identical to a standard
op-amp, the electronic instrumentation amp is almost always internally composed of 3 op-
amps. These are arranged so that there is one op-amp to buffer each input (+,), and one to produce the desired output with adequate impedance matching for the function.
Figure 3.1
Typical instrumentation amplifier schematic
U4ECB10
VEL TECHDR.RR&DR.SR TECHNICAL UNIVERSITY
The most commonly used instrumentation amplifier circuit is shown in the figure. The gain of
the circuit is
The rightmost amplifier, along with the resistors labeled
differential amplifier circuit, with gain =
amplifiers on the left are the buffers. With
gain buffers; the circuit will work in that state, with gain simply equal to
impedance because of the buffers. The buffer gain could be increased by putting resistors
between the buffer inverting inputs and ground to shunt away some of the negative feedback;
however, the single resistor Rgain
method: it increases the differential
mode gain equal to 1. This increases the common
and also enables the buffers to handle much larger common
would be the case if they were separate and had the same gain. Another benefit of the method
is that it boosts the gain using a single resistor rather than a pair, thus avoiding a resistor
matching problem (although the two
the gain of the circuit to be changed by changing the value of a single resistor. A set of switch
selectable resistors or even a potentiometer can be used for
gain of the circuit, without the complexity of having to switch matched pairs of resistors.
The ideal common-mode gain of an instrumentation amplifier is zero. In the circuit shown,
common-mode gain is caused by mismatches in the values of the equally
and by the mis-match in common mode gains of the two input op
matched resistors is a significant difficulty in fabricating these circuits, as is optimizing the
common mode performance of the input op
U4ECB10 LINEAR INTEGRATED CIRCUITS LAB
VEL TECHDR.RR&DR.SR TECHNICAL UNIVERSITY
The most commonly used instrumentation amplifier circuit is shown in the figure. The gain of
The rightmost amplifier, along with the resistors labeled R2 and R3 is just the standard
differential amplifier circuit, with gain = R3 / R2 and differential input resistance = 2
amplifiers on the left are the buffers. With Rgain removed (open circuited), they are simple unity
gain buffers; the circuit will work in that state, with gain simply equal to R3 / R
nce because of the buffers. The buffer gain could be increased by putting resistors
between the buffer inverting inputs and ground to shunt away some of the negative feedback;
gain between the two inverting inputs is a much mo
method: it increases the differential-mode gain of the buffer pair while leaving the common
mode gain equal to 1. This increases the common-mode rejection ratio (CMRR) of the circuit
and also enables the buffers to handle much larger common-mode signals without clipping than
would be the case if they were separate and had the same gain. Another benefit of the method
is that it boosts the gain using a single resistor rather than a pair, thus avoiding a resistor
matching problem (although the two R1s need to be matched), and very conveniently allowing
the gain of the circuit to be changed by changing the value of a single resistor. A set of switch
selectable resistors or even a potentiometer can be used for Rgain, providing easy changes to the
of the circuit, without the complexity of having to switch matched pairs of resistors.
mode gain of an instrumentation amplifier is zero. In the circuit shown,
mode gain is caused by mismatches in the values of the equally-numbered
match in common mode gains of the two input op-amps. Obtaining very closely
matched resistors is a significant difficulty in fabricating these circuits, as is optimizing the
common mode performance of the input op-amps.
LINEAR INTEGRATED CIRCUITS LAB
Page 58
The most commonly used instrumentation amplifier circuit is shown in the figure. The gain of
is just the standard
and differential input resistance = 2R2. The two
removed (open circuited), they are simple unity
R2 and high input
nce because of the buffers. The buffer gain could be increased by putting resistors
between the buffer inverting inputs and ground to shunt away some of the negative feedback;
between the two inverting inputs is a much more elegant
mode gain of the buffer pair while leaving the common-
mode rejection ratio (CMRR) of the circuit
signals without clipping than
would be the case if they were separate and had the same gain. Another benefit of the method
is that it boosts the gain using a single resistor rather than a pair, thus avoiding a resistor-
s need to be matched), and very conveniently allowing
the gain of the circuit to be changed by changing the value of a single resistor. A set of switch-
, providing easy changes to the
of the circuit, without the complexity of having to switch matched pairs of resistors.
mode gain of an instrumentation amplifier is zero. In the circuit shown,
numbered resistors
amps. Obtaining very closely
matched resistors is a significant difficulty in fabricating these circuits, as is optimizing the
U4ECB10
VEL TECHDR.RR&DR.SR TECHNICAL UNIVERSITY
An instrumentation amp can also be built with 2 op
but the gain must be higher than 2 (+6 dB).
Design :
Design the instrumentation amplifier having overall gain of
Stage1:let AV1 =AV2
A=Suare root of (100)
=10
Stage 2:Designing the resistor values:
Asuume =R3/ R2 =10; and (1+2R/R
Taking Rgain=10k on solving R
1.Design the instrumentation ampl
2. Design the instrumentation ampl
3. Design the instrumentation ampl
U4ECB10 LINEAR INTEGRATED CIRCUITS LAB
VEL TECHDR.RR&DR.SR TECHNICAL UNIVERSITY
entation amp can also be built with 2 op-amps to save on cost and increase CMRR,
but the gain must be higher than 2 (+6 dB).
Design the instrumentation amplifier having overall gain of 100
Stage 2:Designing the resistor values:
=10; and (1+2R/Rgain) = 10; taking R2 =1k ,R3 =10
on solving R1 =4.5 k
Design the instrumentation amplifier having overall gain of 25.
Design the instrumentation amplifier having overall gain of 81.
Design the instrumentation amplifier having overall gain of 225.
LINEAR INTEGRATED CIRCUITS LAB
Page 59
amps to save on cost and increase CMRR,
U4ECB10 LINEAR INTEGRATED CIRCUITS LAB
VEL TECHDR.RR&DR.SR TECHNICAL UNIVERSITYPage 60
CIRCUIT DIAGRAM:
Figure 3.2
Instrumentation Amplifier
APPARATUS REQUIRED:
S.No Name of the Apparatus Range Quantity1. Function Generator 3 MHz 22. CRO 30 MHz 13. Dual RPS 0 30 V 14. Op-Amp IC 741 15. Bread Board 16. Resistors As per design As per design7. Connecting wires and probes As required As required
U4ECB10 LINEAR INTEGRATED CIRCUITS LAB
VEL TECHDR.RR&DR.SR TECHNICAL UNIVERSITYPage 61
PROCEDURE:
1.Patch the connections and connect the design resistance Rg extending to have the desired
gain.
2.Measure the input voltage at Vin1 and Vin2 using digital multimeter.
3.The difference in Vin2- Vin1 is amplified and indicated in LCD display.
4.Check the theoretical value with the experimental value.
TABULATION:
RESULT:
Thus the instrumentation amplifier with digital indication was designed and the working of this
was studied.
VIVA QUESTIONS:
1. Why the above circuit is called Instrumentation amplifier?
2. What would happen if the Op-amps were fed back positively, in the above circuit?
3. What changes would you get if you increase or decrease the Rgainvalue?
4. What happens to the output when you change the values of R1, R2, and R3
separately?
5. What is the difference between Instrumentation amplifier and Differential amplifier?
S.No THEORETICAL VALUE PRACTICAL VALUEGAIN
SETTINGVIN1(mv)
VIN2(mv)
VIN2 - VIN1 Vout(mv)
GAIN = Vout/ VIN2 - VIN1
U4ECB10 LINEAR INTEGRATED CIRCUITS LAB
VEL TECHDR.RR&DR.SR TECHNICAL UNIVERSITYPage 62
EXP NO: VOLTAGE REGULATORS
AIM:
1) To design a adjustable voltage regulator using IC LM 317 to vary the output from 1V to
4V.
2) To design a voltage regulator to give output voltage of 4-5V using LM723.
THEORY:
The LM317 is an extremely common positive voltage regulator - many laboratory supplies and other equipment are based on it. It can produce any amount between
1.25V and up to 35V by adjusting the resistance between its adjustment pin and ground.
The internal circuitry of the LM317 can only handle 1.5 A of current as an absolute maximum.
The LM317 is a linear regulator. This means that it dissipates the excess voltage as heat, with more heat produced as the voltage is set lower and lower. Thus heat sink must be
mounted on the regulator that is capable of dissipating the heat produced.
The LM723/LM723C is a voltage regulator designed primarily for series regulator applications. By itself, it will supply output currents up to 150 mA;
but external transistors can be added to provide any desired load current. The circuit features extremely low standby current drain, and provision is made for either linear or
fold back current limiting.
The LM723/LM723C is also useful in a wide range of other applications such as a shunt regulator, a current regulator or a temperature controller.
DESIGN:
CALCULATION:
LM317
The output voltage of the LM317 is
Vout = 1.25V * (1 + R2/R1) + Iadj * R2
If Iadj is negligible then
U4ECB10 LINEAR INTEGRATED CIRCUITS LAB
VEL TECHDR.RR&DR.SR TECHNICAL UNIVERSITYPage 63
Vout 1.25V * (1 + R2/R1)Assume R1=220ohms, R2 = 100ohms
Vo = 1.25[1+(R2/R1)]
= 1.25[1+(100/220)] = 1.81V.
CIRCUIT DIAGRAM:
LM317
Figure 10.1
Voltage Regulator usnig LM317
APPARATUS REQUIRED:
APPARATUS RANGE QUANTITY
Power supply (0-30v) 1
Resistors 5k,220
LM317 1
Voltmeter (0-30v) 1
U4ECB10 LINEAR INTEGRATED CIRCUITS LAB
VEL TECHDR.RR&DR.SR TECHNICAL UNIVERSITYPage 64
PROCEDURE:
1. Make the circuit connection as per the circuit diagram.
2. Set the amplitude of input signal as 12 Volt
3. Vary the DRB value.
4. Measure the output voltage.
5. Tabulate the readings.
TABULATION:
Adjustable DC Power supply using LM317 Vi=10Volts
Sl
No
DRB Value
in KOutput Voltage, Vo (volts)
Theoretical Practical
U4ECB10 LINEAR INTEGRATED CIRCUITS LAB
VEL TECHDR.RR&DR.SR TECHNICAL UNIVERSITYPage 65
(II)LM 723
CIRCUIT DIAGRAM
Figure 10.2
Voltage Regulator Using LM 723
DESIGN:
LM723
Assume R3=1kohms, R4 = 2.2Kohms
Vo = 7.15[1 + (R3/R4)]
= 7.15[1 + (1/2.2)]
= 4.95V
U4ECB10 LINEAR INTEGRATED CIRCUITS LAB
VEL TECHDR.RR&DR.SR TECHNICAL UNIVERSITYPage 66
APPARATUS REQUIRED:
PROCEDURE:
1. Make the circuit connection as per the circuit diagram.
2. Set the amplitude of input signal as 12 Volt
3. Vary the DRB value.
4. Measure the output voltage.
5. Tabulate the readings.
DC Power supply using LM723 Vi=10 Volts
Sl
No
DRB Value
in KOutput Voltage, Vo (volts)
Theoretical Practical
S.No.ITEM SPECIFICATION QTY
1 IC 723 2
2 Resistors 1kohms 2
3 Capacitors 100 pF,0.1microfarad 1 each
3 R. P. S (0- 30) V, 1 mA 1
4 DRB 1
5 Bread Board and
Connecting Wires
1,as
required
U4ECB10 LINEAR INTEGRATED CIRCUITS LAB
VEL TECHDR.RR&DR.SR TECHNICAL UNIVERSITYPage 67
RESULT: Thus voltage regulator circuit is constructed and verified.
VIVA QUESTIONS:
1. What is regulated power supply?
2. What is series voltage regulator?
3. What is negative voltage regulator
U4ECB10 LINEAR INTEGRATED CIRCUITS LAB
VEL TECHDR.RR&DR.SR TECHNICAL UNIVERSITYPage 68
EXP NO: STUDY OF SMPS
AIM: Study the power supply ( SMPS) and their voltage levels by multi-meter with proper attention to measure various voltage .
THEORY:Switch mode power supplies (SMPS) have become the architecture of choice for power conversion because of their economy, higher efficiency and lighter weight. In this lab you will investigate the basic operating principles of a switch mode power supply, and then design, build and test a simple supply given a few basic components.A considerable amount of background theory and design advice is included following the Procedure description below.
Block Diagram:
Figure 11.1
Block Diagram of SMPS
U4ECB10 LINEAR INTEGRATED CIRCUITS LAB
VEL TECHDR.RR&DR.SR TECHNICAL UNIVERSITYPage 69
Design Objective:
Your objective will be to build either a 5V or 12V, 5W regulated supply with a maximum1% ripple at full load, maintained over a 10% input voltage variation. If the availablecomponents are such that you must design for a slightly different output voltage, discuss this change in objective with your supervisor. It is more important that you understand the design process and characterize the supply you build than to have a specific output voltage. Note that you will also have to test your supply to verify the specifications, and to characterize other parameters such as its response to step changes in load current and how long it can maintain the output if the input supply is interrupted.
SMPS Investigation and AnalysisThe first part of this lab involves investigating the principles of operation of a SMPS and the parameters that you will employ in the design.
Design and testing of a regulated SMPS For the remainder of this lab, you will be asked to design, build and test a regulated Switch Mode Power Supply. The restrictions you will be required to work within are as follows:
the input must be from the 120/24VAC step-down transformers available in the laboratory
the integrated regulator circuit available to you is from STMicroelectronicss UC384xB family: specifically, the UC3845B
a switch mode transformer is available: TS223-Y01MS (or a TS227-Y05MS, TS202-Y03MS, or TS222-Y01MS) from Coil Winding Specialists. While these vary slightly in specifications, they are all designed for approximately the same output power and voltages.
Remaining components must be from laboratory stock (A reasonable selection of suitable components is available. Some parameters may have to be adjusted slightly to conform to component specs.)
RESULT:
The study of SMPS is done by measuring the quantities.
U4ECB10 LINEAR INTEGRATED CIRCUITS LAB
VEL TECHDR.RR&DR.SR TECHNICAL UNIVERSITYPage 70
EXP NO: DESIGN OF FILTERS USING PSPICE
AIM: To simulate the Active filters circuits using PSPICE.
THEORY:
LOWPASS FILTER:
An improved filter response can be obtained by using a second order active filter. A second
order filter consists of two RC pairs and has a roll-off rate of -40 dB/decade. A general second
order filter (Sallen Kay filter) is used to analyze different LP, HP, BP and BSF.
HIGHPASS FILTER:
The high pass filter is the complement of the low pass filter. Thus the high pass filter canbe
obtained by interchanging R and C in the circuit of low pass configuration. A high pass
filterallows only frequencies above a certain bread point to pass through and it terminates the
lowfrequency components. The range of frequencies beyond its lower cut off frequency fL is
calledstop band.
BANDPASS FILTER:
The BPF is the combination of high and low pass filters and this allows a specified range of
frequencies to pass through. It has two stop bands in range of frequencies between 0 to fL
andbeyond fH. The band b/w fL and fH is called pass band. Hence its bandwidth is (fL-fH). This
filter has a maximum gain at the resonant frequency (fr) which is defined as
U4ECB10 LINEAR INTEGRATED CIRCUITS LAB
VEL TECHDR.RR&DR.SR TECHNICAL UNIVERSITYPage 71
DESIGN:Given: fH = 1 KHz = 1/ (2RC) Let C = 0.1 F, R = 1.6 K
For n = 2, (damping factor) = 1.414,Pass band gain = Ao = 3 - =3 1.414 = 1.586.Transfer function of second order Butterworth LPF as:
1.586
H(s) = ---------------------------
S2 + 1.414 s + 1
Now Ao = 1 + (Rf / R1) = 1.586 = 1 + 0.586
Let Ri = 10 K, then Rf = 5.86 K1.Design the second order high pass filter at a cut off frequency of 1khz with passband gain of 2.
2.Design a wideband pass filter with fL =200Hz,fH =1kHz and pass band gain=4
3.Design a second order low pass filter at high cutoff frequency of 1kHz.
CIRCUIT DIAGRAM:
LPF:
Figure 5.1 Low pass filter connection diagram
U4ECB10 LINEAR INTEGRATED CIRCUITS LAB
VEL TECHDR.RR&DR.SR TECHNICAL UNIVERSITYPage 72
HPF:
Figure 5.2High pass filter connection Diagram
BPF:
Figure 5.3Band pass filter connection Diagram
U4ECB10 LINEAR INTEGRATED CIRCUITS LAB
VEL TECHDR.RR&DR.SR TECHNICAL UNIVERSITYPage 73
APPARATUS REQUIRED:S.No Name of the Apparatus Range Quantity
1. Function Generator 3 MHz 22. CRO 30 MHz 13. Dual RPS 0 30 V 14. Op-Amp IC 741 15. Bread Board 16. Resistors As per design As per design7. Capacitors As per design As per design8. Connecting wires and probes As required As required
PROCEDURE:Solution:1. Select programs->microsim eval8->design manager. click on tools->schematics. select draw->get new part->advanced.2.To create the circuit we need a uA 741 op-amp, two dc supplies(VDC),four labels(GLOBAL),six ground terminals(AGND),five resistors(R),two capacitors(c),and VAC. using part browser advanced. select all the above parts one at a time and place them in the work space. now close the get new part option by clicking on place and close.3. Arrange the parts in the work area the way they appear. Interconnect the parts using draw->wire.4.The parts in the circuit that require setting new attributes are the two dc supplies, five resistors, two capacitors, and VAC.A parts attribute is changed by first double-clicking on the part of the label and then entering the new value. set the attributes and change the attribute values of above parts. Also,set the GLOBAL labels, two each as +Vcc and VEE. To set up VAC attributes double-click on the symbol and then in pop-up window change magnitude and as shown below.ACMAG->1v->saveattr->change display->both name and value->0kACPHASE->0->save attr->0kAdd the location of V0 to the out of the circuit.5. Since a plot of V0 versus frequency is desired,open analysis->probe setup and click on automatically run probe after simulation.6.Open analysis->setup->Enable AC sweepOpen AC sweep->decade->pts/decade->10->start freq->10HZ->end freq->10HZ7. Save the circuit as a file.8.Open analysis->create netlist to make sure that there are no wiring errors.Aworning will appear if there are any errors.click onOK ana a list ofthe error locations will be displayed.if there are no errors,the circuit is ready for simulation.
U4ECB10 LINEAR INTEGRATED CIRCUITS LAB
VEL TECHDR.RR&DR.SR TECHNICAL UNIVERSITYPage 74
9. Use analysis->simulate->analysis type->AC to execute the program.click on OK.if all is OK,the probe window with a black sceen will appear.10. Use trace->add->V[V0]Plot->Y axis setting->scale->log11. To add the V0 label to the graph, use tools->Label->Text and a text label box will be displayed. Type inVo and click on Ok.use the mouse toplace Vo above the wave form.12. Print the circuit schematics and the plot. The spice model of low pass filter and the output waveform are shown respectively.
MODEL GRAPH:
LPF:
Frequency Response Characteristics:
Gain - 3 dB IndB
fc = 1KHz
Frequency (Hz)
HPF:
U4ECB10 LINEAR INTEGRATED CIRCUITS LAB
VEL TECHDR.RR&DR.SR TECHNICAL UNIVERSITYPage 75
BPF:
RESULT:
Active filter are simulated by using Pspice and Characteristics are observed in the out put.
U4ECB10 LINEAR INTEGRATED CIRCUITS LAB
VEL TECHDR.RR&DR.SR TECHNICAL UNIVERSITYPage 76