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M.H. Perrott
Analysis and Design of Analog Integrated CircuitsLecture 10
Frequency Response of Amplifiers
Michael H. PerrottFebruary 29, 2012
Copyright © 2012 by Michael H. PerrottAll rights reserved.
M.H. Perrott
Open Loop Versus Closed Loop Amplifier Topologies
Open loop – want all bandwidth limiting poles to be as high in frequency as possible
Closed loop – want one pole to be dominant and all other parasitic poles to be as high in frequency as possible
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VoutZsrc
Vsrc
SourceAmp VoutZsrc
Vsrc
SourceAmp
Zf
Open Loop Closed Loop
Vout/Vin
(dB)
w (rad/s)w0 w1 w2
Vout/Vin
(dB)
w (rad/s)w0 w1 w2
VinVin
M.H. Perrott
OCT Method of Estimating Amplifier Bandwidth
OCT method calculates by the following steps:- Compute the effective resistance Rthj seen by each
capacitor, Cj, with other caps as open circuits AC coupling caps are not included – considered as shorts
- Form the “open circuit” time constant Tj = RthjCj for each capacitor Cj- Sum all of the “open circuit” time constants
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⇒ BW ≈ 1Pmj=1RthjCj
rad/s
20log(Vout/Vin)(dB)
w (rad/s)w0 w1 w2
MidBand Gain f (Hz) =w (rad/s)
2π
Note:
M.H. Perrott
Another Useful Analysis Tool: Miller Effect
Derive input impedance (assume gain of amplifier = A):
Consider the case where Zf is a capacitor
- For negative A, input impedance sees increased cap value- For A = 1, input impedance sees no influence from cap- For A > 1, input impedance sees negative capacitance!
Can be used to create active inductor for a specific frequency4
VoutA
Zf
Vin
Zin
iin
Zin =Viniin
=Vin
(Vin − Vout)/Zf=
VinZfVin −AVin
=Zf1−A
Zf =1
sC⇒ Zin =
1
s(1− A)C
M.H. Perrott
Key Capacitances for CMOS Devices
S D
GVGS
VD>ΔV
ID
LDLD
overlap cap: Cov = WLDCox + WCfringe
B
CgcCcb
Cov
CjdbCjsb
Cov
Side View
gate to channel cap: Cgc = CoxW(L-2LD)
channel to bulk cap: Ccb - ignore in this class
S D
Top View
W
E
L
E
E
source to bulk cap: Cjsb = 1 + VSB ΦB
Cj(0)
1 + VSB ΦB
Cjsw(0)WE + (W + 2E)
junction bottom wall cap (per area)
junction sidewall cap (per length)
drain to bulk cap: Cjsd = 1 + VDB ΦB
Cj(0)
1 + VDB ΦB
Cjsw(0)WE + (W + 2E)
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(make 2W for "4 sided" perimeter in some cases)
L
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M.H. Perrott
CMOS Hybrid- Model with Caps (Device in Saturation)
RS
RG
RD
RD
RS
RG
-gmbvsvgs
vs
rogmvgs
ID
Csb
Cgs
CgdCdb
Cgs = Cgc + Cov = CoxW(L-2LD) + Cov23
Cgd = Cov
Csb = Cjsb (area + perimeter junction capacitance)
Cdb = Cjdb (area + perimeter junction capacitance)
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M.H. Perrott
OCT Thevenin Resistance Calculations
Cgs: Thevenin resistance between gate and source
Cgd: Thevenin resistance between gate and drain
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Rthgs
Rthgd
Cgs
Cgd
Rthgs
Rthgd
RS
RG
RD RD
RS
RG
-gmbvsvgs
vs
rogmvgs
ID
Rthgs =RS(1 +RD/ro) +RG(1 + (gmb + 1/ro)RS +RD/ro)
1 + (gm + gmb)RS + (RS +RD)/ro
Rthgd = (RD +RG)(1− rods/ro) + rodsgmRGwhere rods = ro||
RD1 + (gm + gmb)RS
M.H. Perrott
OCT Example: Design Wide Bandwidth Amplifier
Step 1: identify AC coupling versus OCT capacitors- AC coupling caps will be regarded as shorts
Step 2: calculate individual OCT time constants Step 3: identify long OCT time constants and modify
circuit to improve its bandwidth
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Rin
RLID
Vin
Vout
CL
Assumptions:gm = 1/(100), = 0, = 0Cgs = 10fF, Cgd = 3fFCsb = 5fF, Cdb = 4fFRin = 4kRL = 1kCL = 100fF
M.H. Perrott
Step 1: Identify OCT Capacitors
Which time constants are easy to calculate? How do we efficiently calculate the more difficult
cases?
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Rin
RL
Vin
Vout
Rth1 (CL+Cdb)Rth2 (Cgs)
Rth3 (Cgd)
Assumptions:gm = 1/(100), = 0, = 0Cgs = 10fF, Cgd = 3fFCsb = 5fF, Cdb = 4fFRin = 4kRL = 1kCL = 100fF
M.H. Perrott
Step 2: OCT Time Constant Calculations
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Rin
RL
Vin
Vout
Rth1 (CL+Cdb)Rth2 (Cgs)
Rth3 (Cgd)
Assumptions:gm = 1/(100), = 0, = 0Cgs = 10fF, Cgd = 3fFCsb = 5fF, Cdb = 4fFRin = 4kRL = 1kCL = 100fF
Easy ones:
Use formula for 3:
Rth1 = RL||Rthd = RL||∞ = RL = 1kΩ ⇒ τ1 = 1kΩ · 104fF = 104ps
Rth2 = Rin ||Rthg = Rin ||∞ = Rin = 4kΩ ⇒ τ2 = 4kΩ · 10fF = 40ps
Rthgd = (RD +RG)(1− rods/ro) + rodsgmRGwhere rods = ro||
RD1 + (gm + gmb)RS
= RD = RL
⇒ Rth3 = (RL +Rin)(1− 0) +RLgmRin = 5.5kΩ + 40kΩ = 45.5kΩ⇒ τ3 = 45.5kΩ · 3fF = 136.5ps
M.H. Perrott
Step 3: Identify Largest OCT Time Constant
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Rin
RL
Vin
Vout
Rth1 (CL+Cdb)Rth2 (Cgs)
Rth3 (Cgd)
Assumptions:gm = 1/(100), = 0, = 0Cgs = 10fF, Cgd = 3fFCsb = 5fF, Cdb = 4fFRin = 4kRL = 1kCL = 100fF
Time constant associated with Cgd is the longest:
Why is this time constant so large given that it is associated with the lowest value capacitor?
How do we change the amplifier topology to reduce this time constant value?
τ3 = 45.5kΩ · 3fF = 136.5ps
M.H. Perrott
The Miller Effect Analysis Provides Helpful Intuition
Notice that Cgd is in the feedback path of the common source amplifier- Recall Miller effect calculation: - For this amplifier:
This analysis agrees well with OCT calculation of 136.5ps
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Cgd
Rin
RL
Vin
Vout
A
Cin
Cgd
Cin
A = −gmRL ⇒ Cin = (1 + gmRL)Cgd = 11 · Cgd = 33fF
Cin = (1−A)Cgd
⇒ τ3 = RinCin = 4kΩ · 33fF = 132ps
Can we change the amplifier topology to lower this time constant?
M.H. Perrott
Consider Adding a Cascode Device
Examine the impact of this topological change using the Miller Effect analysis
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Rin
RL
Vin
Vout
Cin
Cgd1
Vbias
M1
M2
A = −gm11
gm2≈ −1 ⇒ Cin = (1 + 1)Cgd1 = 2 · Cgd1 = 6fF
⇒ τ3 = RinCin = 4kΩ · 6fF = 24ps
Cascode device dramatically reduces the Cgd1 time constant!
M.H. Perrott
Does the Miller Effect Impact the Cascode Device?
Observe that the capacitance seen by Vbias is not of concern since this voltage is not part of the signal path
The signal path sees the time constant:
- This time constant is much smaller than the other time constants of the amplifier
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Rin
RL
Vin
VoutCgd2
Vbias
M1
M2
τ4 = RL||Rthd2 · Cgd2 ≈ RL · Cgd2 = 1kΩ · 3fF = 3ps
M.H. Perrott
Perform OCT Calculations for Updated Amplifier
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Rth4 (Cgd2)
Rin
RL
Vin
Vout
Vbias
M1
M2
Rth1 (CL+Cdb2)
Rth2 (Cgs1)
Rth3 (Cgd1)
Rth5 (Cgs2)
Rth6 (Cds1+Csb2)
Rth1 = RL||Rthd2 = RL = 1kΩ ⇒ τ1 = 1kΩ · 104fF = 104ps
Rth2 = Rin ||Rthg1 = Rin = 4kΩ ⇒ τ2 = 4kΩ · 10fF = 40ps
Rth5 = Rths2 ||Rthd1 ≈ 1/gm2||∞ = 100Ω ⇒ τ5 = 100Ω · 10fF = 1psRth4 = RL||Rthd2 ≈ RL = 1kΩ ⇒ τ3 = 1kΩ · 3fF = 3ps
Assumptions for all devices:gm = 1/(100), = 0, = 0Cgs = 10fF, Cgd = 3fFCsb = 5fF, Cdb = 4fFRin = 4kRL = 1kCL = 100fF
Rth6 = Rthd1 ||Rths2 =∞||1/gm2 = 100Ω ⇒ τ6 = 100Ω · 9fF = 0.9ps
M.H. Perrott
Perform OCT Calculations for Updated Amplifier
Use Thevenin formula for Cgd calculation:
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Rth4 (Cgd2)
Rin
RL
Vin
Vout
Vbias
M1
M2
Rth1 (CL+Cdb2)
Rth2 (Cgs1)
Rth3 (Cgd1)
Rth5 (Cgs2)
Rth6 (Cds1+Csb2)
Assumptions for all devices:gm = 1/(100), = 0, = 0Cgs = 10fF, Cgd = 3fFCsb = 5fF, Cdb = 4fFRin = 4kRL = 1kCL = 100fF
Rth3 = (RD1 +RG1)(1− rods/ro1) + rodsgm1RG1
⇒ Rth3 = (1
gm2+Rin)(1− 0) +
1
gm2gm1Rin = 4.1kΩ+ 4kΩ = 8.1kΩ
⇒ τ3 = 8.1kΩ · 3fF = 24.3ps
where rods = ro1||RD1
1 + (gm1 + gmb1 )RS1
M.H. Perrott
Identify Longest OCT Time Constant
The load capacitance now presents the largest time constant:
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Rth4 (Cgd2)
Rin
RL
Vin
Vout
Vbias
M1
M2
Rth1 (CL+Cdb2)
Rth2 (Cgs1)
Rth3 (Cgd1)
Rth5 (Cgs2)
Rth6 (Cds1+Csb2)
Assumptions for all devices:gm = 1/(100), = 0, = 0Cgs = 10fF, Cgd = 3fFCsb = 5fF, Cdb = 4fFRin = 4kRL = 1kCL = 100fF
Rth1 = RL||Rthd2 = RL = 1kΩ ⇒ τ1 = 1kΩ · 104fF = 104ps
Can we change the amplifier topology to lower this time constant?
M.H. Perrott
Add a Source Follower to the Output
Key idea: reduce the time constant associated with CL by decreasing the Thevenin resistance that it sees- Previous design presented RL = 1K to CL- Source follower presents Rths3 = 1/gm3 = 100 to CL
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Rin
RL
Vin
VoutVbias
M1
M2
M3
Ibias CL
For all devices:gm = 1/(100), = 0, = 0Cgs = 10fF, Cgd = 3fFCsb = 5fF, Cdb = 4fFRin = 4kRL = 1kCL = 100fF
Source follower should reduce CL time constant by a factor of ten!
M.H. Perrott
Calculation of New CL Time Constant
Formal calculation:
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Rth4 (Cgd2)
Rin
RL
Vin
VoutVbias
M1
M2
Rth1 (CL+Csb2)
Rth2 (Cgs1)
Rth3 (Cgd1)
Rth5 (Cgs2)
M3
Ibias
Rth8 (Cgd3)
Rth7 (Cgs3)
Rth6(Cds1+Csb2)
For all devices:gm = 1/(100), = 0, = 0Cgs = 10fF, Cgd = 3fFCsb = 5fF, Cdb = 4fFRin = 4kRL = 1kCL = 100fF
How large are the additional time constants created by M3?
Rth1 = Rths3 = 1/gm3 = 100Ω ⇒ τ1 = 100Ω · 104fF = 10.4ps
M.H. Perrott
Calculation of Additional Time Constants from M3
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Rth4 (Cgd2)
Rin
RL
Vin
VoutVbias
M1
M2
Rth1 (CL+Csb2)
Rth2 (Cgs1)
Rth3 (Cgd1)
Rth5 (Cgs2)
M3
Ibias
Rth8 (Cgd3)
Rth7 (Cgs3)
Rth6(Cds1+Csb2)
For all devices:gm = 1/(100), = 0, = 0Cgs = 10fF, Cgd = 3fFCsb = 5fF, Cdb = 4fFRin = 4kRL = 1kCL = 100fF
Rth8 = RL||Rthd2 ≈ RL = 1kΩ ⇒ τ8 = 1kΩ · 3fF = 3ps
⇒ τ7 = 100Ω · 10fF = 1ps
Rth7 =RS3(1 +RD3/ro3) +RG3(1 + (gmb3 + 1/ro3)RS3 +RD3/ro3)
1 + (gm3 + gmb3 )RS3 + (RS3 +RD3)/ro3
⇒ Rth7 =1 + RD3/ro3 +RG3(gmb3 + 1/ro3)
gm3 + gmb3 + 1/ro3=
1 + 0 + 0
gm3 + 0 + 0= 100Ω
M.H. Perrott
Estimate Bandwidth Based on OCT Calculations
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Rth4 (Cgd2)
Rin
RL
Vin
VoutVbias
M1
M2
Rth1 (CL+Csb2)
Rth2 (Cgs1)
Rth3 (Cgd1)
Rth5 (Cgs2)
M3
Ibias
Rth8 (Cgd3)
Rth7 (Cgs3)
Rth6(Cds1+Csb2)
τ1 = 10.4ps
τ2 = 40ps
τ3 = 24.3ps
τ4 = 3ps
τ5 = 1ps
τ6 = 0.9ps
τ7 = 1ps
τ8 = 3ps
BW ≈ 1Pmj=1RthjCj
=1
83.6ps= 11.96 Grad/s
⇒ BW ≈ 11.96
2π= 1.9GHz
M.H. Perrott
Summary
Two techniques prove very useful when designing amplifiers for desired frequency response behavior- Open Circuit Time Constant method- Miller Effect analysis
Thevenin resistance analysis in combination with the above offers tremendous insight for designing amplifier topologies- OCT method allows quick discovery of large time
constants- Miller effect provides intuition of the impact of placing
capacitors within feedback- Awareness of impedances presented by various
amplifier stages allows intuitive approach to achieve reduction of large time constants
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