8/15/2019 JTAG_ Tutorial_ the Role of JTAG in System Debug & Test Throughout the Embedded System Development Lifecycle

1/3

04/02/2016 JTAG: Tutorial: The Role of JTAG in system debug & test throughout the embedded system development lifecycle

http://boundaryscan.blogspot.in/2010/04/tutorial-role-of-jtag-in-system-debug.html 1/3

Thursday, April 15, 2010

Tutorial: The Role of JTAG in system debug & test throughout theembedded system development lifecycle

JTAG Debug Advantages

The primary advantages of using a debugger with JTAG access are:

* The JTAG connection provides direct access to the otherwise hidden CPU core

* The JTAG interface consumes no system I/O ports (serial, Ethernet)

* The JTAG debug method uses little or no system memory allocation (as in monitors)

* There is no monitor to crash along with a system crash (not useful at board bring-up)

* The JTAG connection does not require target system power (except some USB-only

probes)

* A JTAG debugger can "steal cycles" to read registers/memory without stopping CPU(assuming that the debug logic built into the CPU provides this capability)

* A JTAG debug session can reset and/or initialize the system (Note: System reset is not

part of JTAG. Rather, it is an adjunct to using JTAG for remote debugging, enabling a

remote reset of a JTAG probe and target over a network.)

* A JTAG debugger can connect to the debug logic without perturbing the system

* Provides the only reasonable means to connect to targets that do not yet have working

bootcode or I/O drivers

JTAG Debug Limitations

The JTAG debug connection does not solve all the world's debug problems because of 

some serious limitations:

1) Code download over JTAG is not the fastest way to download large programs (>20MB),especially for target systems that rely on 10/100BaseT Ethernet access.

2) Multicore system debug where multiple CPU cores are daisy-chained on the same scan

chain and can be individually accessed, but implementing a synchronous debug operation

requires additional on-chip hardware to circumvent skidding associated with JTAG

oper ations.

Subsequently, hundreds of CPU cycles  may go  by after an asynchronous JTAG  stop

command is issued. Examples of these capabilities are now beginning to appear, e.g., the

global inter-processor control logic in Cavium Networks Octeon family, with up to 16 64-bit

cnMIPS cores.

3) "Printf" still provides an easy complement for extracting a variety of debug statusreports.

JTAG to the Rescue - Boundary Scan Testing

The Joint Test Action Group (JTAG) began solving board-level test problems in the 1990's

by standardizing a serial scan chain method (JTAG; IEEE 1149.1) for accessing on-chip

resources and additional shift registers built into the I/O paths of every IC for boundary

scan testing.

Before the emergence of boundary scan testing, debugging of potential solder bump

issues underneath a chip assembly was difficult. Prior to board assembly, every IC is

tested to assure its flawless operation. Thus, if the assembled printed circuit board PCB

does not work properly, the malfunction must be caused by a solder bridge, gap or a flaw

in the printed circuit board. But what if the flaw is underneath the chip assembly, where itcan't be seen or repaired easily?

The boundary scan testing methodology addresses this issue. As illustrated in Figure 1, a

serial scan path through I/O registers was added and exercised by a sophisticated test

program unique to each board to help identify a faulty chip or other device, so that these

Welcome to JTAG Blog

Since its introduction as an industrystandard in 1990, boundary-scan (alsoknown as JTAG) has enjoyed growingpopularity for board level manufacturingtest applications.

Boundary-scan has rapidly become thetechnology of choice for building reliablehigh technology electronic products with ahigh degree of testability. Due to the low-cost and IC level access capabilities of 

boundary-scan, its use has expandedbeyond traditional board test applicationsinto product design and service.

This blog provides a brief overview of theboundary-scan architecture and the newtechnology trends that make usingboundary-scan essential for dramaticallyreducing development and productioncosts. We will also describe the varioususes of boundary-scan and its application.

About JTAG Boundary ScanTechnology

What is JTAG?

JTAG for Production Test

Applying JTAG for Product Dev

Applying JTAG for Field Service

JTAG Tools

About BSDL

Definition of BSDL

What is BSDL?

Using BSDL

Popular BSDL Files

The Boundary-Scan Handbook

Subscribe To JTAG Blog

Followers

Join this site

with Google Friend Connect

Members (4)

 Already a member? Sign in

Blog Archive

0   More Next Blog»   akhil.chaudhry1990@gmail.com  Dashboard   Sign Out

JTAGJTAG blog provides you with a informational resource on JTAG products, boundary scan testing, and the latest news on JTAG.

  Posts

 Comments

http://boundaryscan.blogspot.com/2008/11/applying-jtag-for-product-development.htmlhttp://boundaryscan.blogspot.com/2008/11/jtag-for-production-test.htmlhttp://boundaryscan.blogspot.in/https://www.blogger.com/https://www.blogger.com/next-blog?navBar=true&blogID=4210622018534791720https://www.blogger.com/homehttp://boundaryscan.blogspot.in/http://boundaryscan.blogspot.com/logout?d=https://www.blogger.com/logout-redirect.g?blogID%3D4210622018534791720%26postID%3D3907763704090743528https://www.blogger.com/homehttps://www.blogger.com/next-blog?navBar=true&blogID=4210622018534791720https://www.blogger.com/http://boundaryscan.blogspot.com/2008/11/boundary-scan-handbook.htmlhttp://boundaryscan.blogspot.com/2008/12/popular-bsdl-files.htmlhttp://boundaryscan.blogspot.com/2008/12/using-bsdl.htmlhttp://boundaryscan.blogspot.com/2008/11/what-is-bsdl.htmlhttp://boundaryscan.blogspot.com/2008/11/bsdl.htmlhttp://boundaryscan.blogspot.com/2008/11/what-jtag-tools-are-needed-in-previous.htmlhttp://boundaryscan.blogspot.com/2008/11/applying-jtag.htmlhttp://boundaryscan.blogspot.com/2008/11/applying-jtag-for-product-development.htmlhttp://boundaryscan.blogspot.com/2008/11/jtag-for-production-test.htmlhttp://boundaryscan.blogspot.com/2008/10/what-is-jtag.html

8/15/2019 JTAG_ Tutorial_ the Role of JTAG in System Debug & Test Throughout the Embedded System Development Lifecycle

2/3

04/02/2016 JTAG: Tutorial: The Role of JTAG in system debug & test throughout the embedded system development lifecycle

http://boundaryscan.blogspot.in/2010/04/tutorial-role-of-jtag-in-system-debug.html 2/3

can be reworked or replaced. In the diagram in Figure 1, each grey box represents a

category of device function, e.g., flash, peripherals, I/O ports, etc.

Figure 1. JTAG connection used for boundary scan testing

The JTAG approach provides a method to test very complex systems, while keeping the

pin count low. Specifically, the IEEE1149.1 specification requires only 5 pins for the JTAG

connection, no matter how long the scan chain register path is. The standard pin functions

for the JTAG Test Access Port include:

TRST Test Reset (output from JTAG probe to chip to reset JTAG test logic)

TCK Test Clock (output from JTAG probe to chip to set JTAG scan rate)

TDI Test Data Input (serial test data input to chip)

TDO Test Data Output (serial test data output from chip)

TMS Test Mode Select (determines run or debug mode by state at TCK rising edge)

Several companies focus almost exclusively on boundary scan testing, specializing in

both the JTAG hardware connection devices and host-based test software tools to adapt

the test program to each board design.

The 2nd Role of JTAG - CPU Core Access for Software/Hardware Debug

Given that the CPU processor core is now hidden from observation or control by integrated

caches in the core, by local on chip busses, by an MMU that dynamically allocates

memory, and by other SOC peripherals and I/O blocks, the JTAG path provides a direct

connection into the debug logic inside the CPU. Thus, we now have a means of observing

and controlling program execution. Since caches and peripherals have moved on chip, so

must the debug logic (Figure 2 below).

Figure 2. JTAG connection use for software debug/development

With this direct core access, host-based debugger software can now assert a "debug

exception", redirecting the processor to get the next instruction from the debug logic

registers instead of the program counter, thus effectively taking control of the processor to

perform software debug operations:

* Run-control: Start, Stop, Single-Step, Step Into/Over (source or instruction)

* Set hardware and software breakpoints

* Specify conditions to be met or scripts to be executed at breakpoints

* Control reset and initialization of the target system

* Download code to be debugged or code to be programmed into flash* Execute flash programming and other semi-hosting utilities

Note that in both of the above applications, boundary scan and software debug, the role of 

JTAG is only to provide the physical layer communications interface, analogous to the

PHY layer in the ISO Open Systems Interconnect model.

News Blog - Corelis

Corelis Releases New CD Version

8.1 Boundary-Scan Too l Suite

1 year ago

The Digital Electronics Blog

E-Book access moved to new

▼ 2012 (1)

► January (1)

▼ 2011 (1)

► January (1)

▼ 2010 (10)

▼ November (8)

Flash Programming Speed

Adaptive FPGA Programming for 

SVF and STAPL/JAM

HSWAP pin for FPGA

Bypass Boundary-Scan Devices

JTAG Program CPLDs & FPGAs

Phase-locked Loops (PLLs) in

Clock Buffers - JTAG ...

Strong Pull-ups on FPGAs - JTAG

Boundary-Scan Test...

JTAG Cables

▼ April (1)

Tutorial: The Role of JTAG insystem debug & test ...

► March (1)

▼ 2009 (5)

► November (2)

► May (1)

► January (2)

▼ 2008 (18)

► December (4)

► November (11)

► October (3)

About Me

JTAG

 A JTAG enthusiast, I am

providing an overview of 

the JTAG architecture

and the new technology trends that make

using boundary-scan essential for 

dramatically reducing development and

production costs. I also describe the

various uses of JTAG and the tools

available today for supporting boundary-

scan technology.

Read how JTAG boundary-scan

technology can be applied to the whole

product life cycle including product design,

prototype debugging, production, and field

service. This means the cost of the

boundary-scan tools can be amortized over 

the entire product life cycle, not just the

production phase.

iew my complete profile

Blog Roll

https://www.blogger.com/profile/02902721147347877163https://www.blogger.com/profile/02902721147347877163https://www.blogger.com/profile/02902721147347877163http://boundaryscan.blogspot.in/2008_10_01_archive.htmlhttp://void%280%29/http://boundaryscan.blogspot.in/2008_11_01_archive.htmlhttp://void%280%29/http://boundaryscan.blogspot.in/2008_12_01_archive.htmlhttp://void%280%29/http://boundaryscan.blogspot.in/search?updated-min=2008-01-01T00:00:00-08:00&updated-max=2009-01-01T00:00:00-08:00&max-results=18http://void%280%29/http://boundaryscan.blogspot.in/2009_01_01_archive.htmlhttp://void%280%29/http://boundaryscan.blogspot.in/2009_05_01_archive.htmlhttp://void%280%29/http://boundaryscan.blogspot.in/2009_11_01_archive.htmlhttp://void%280%29/http://boundaryscan.blogspot.in/search?updated-min=2009-01-01T00:00:00-08:00&updated-max=2010-01-01T00:00:00-08:00&max-results=5http://void%280%29/http://boundaryscan.blogspot.in/2010_03_01_archive.htmlhttp://void%280%29/http://boundaryscan.blogspot.in/2010/04/tutorial-role-of-jtag-in-system-debug.htmlhttp://boundaryscan.blogspot.in/2010_04_01_archive.htmlhttp://void%280%29/http://boundaryscan.blogspot.in/2010/11/jtag-cables.htmlhttp://boundaryscan.blogspot.in/2010/11/strong-pull-ups-on-fpgas-jtag-boundary.htmlhttp://boundaryscan.blogspot.in/2010/11/phase-locked-loops-plls-in-clock.htmlhttp://boundaryscan.blogspot.in/2010/11/jtag-program-cplds-fpgas.htmlhttp://boundaryscan.blogspot.in/2010/11/bypass-boundary-scan-devices.htmlhttp://boundaryscan.blogspot.in/2010/11/hswap-pin-for-fpga.htmlhttp://boundaryscan.blogspot.in/2010/11/adaptive-fpga-programming-for-svf-and.htmlhttp://boundaryscan.blogspot.in/2010/11/flash-programming-speed.htmlhttp://boundaryscan.blogspot.in/2010_11_01_archive.htmlhttp://void%280%29/http://boundaryscan.blogspot.in/search?updated-min=2010-01-01T00:00:00-08:00&updated-max=2011-01-01T00:00:00-08:00&max-results=10http://void%280%29/http://boundaryscan.blogspot.in/2011_01_01_archive.htmlhttp://void%280%29/http://boundaryscan.blogspot.in/search?updated-min=2011-01-01T00:00:00-08:00&updated-max=2012-01-01T00:00:00-08:00&max-results=1http://void%280%29/http://boundaryscan.blogspot.in/2012_01_01_archive.htmlhttp://void%280%29/http://boundaryscan.blogspot.in/search?updated-min=2012-01-01T00:00:00-08:00&updated-max=2013-01-01T00:00:00-08:00&max-results=1http://void%280%29/http://feedproxy.google.com/~r/TheDigitalElectronicsBlog/~3/xPOeLh1py-Y/e-book-access-moved-to-new-domain.htmlhttp://blog.digitalelectronics.co.in/http://corelisnews.blogspot.com/2014/11/corelis-releases-new-cd-version-81.htmlhttp://corelisnews.blogspot.com/

8/15/2019 JTAG_ Tutorial_ the Role of JTAG in System Debug & Test Throughout the Embedded System Development Lifecycle

3/3

04/02/2016 JTAG: Tutorial: The Role of JTAG in system debug & test throughout the embedded system development lifecycle

http://boundaryscan.blogspot.in/2010/04/tutorial-role-of-jtag-in-system-debug.html 3/3

Newer Post Older Post

The protocol for what debug functions are supported is embodied in the debug logic,

designed into the CPU core and the debugger software capabilities running on the host

computer.

[1][2][3][4]

Source: Tutorial: The Role of JTAG in system debug & test throughout the

embedded system development lifecycle by Lyle Pittroff 

Posted by JTAG at 5:21 PM 

2 COMMENTS:

Post a Comment

Home

Subscribe to: Post Comments (Atom)

domain

1 year ago

Think Techie

How to host and manage Git

repositories

2 years ago

Interesting Links

JTAG Tutorial

JTAG Technical Primer 

JTAG Test Overview

JTAG Applications

DFT Digest

Design for Testability Guidelines

i2C

IEEE Standard

JTAG

Wikipedia: JTAG

More Links

JTAG

SPI Analyzer 

Directory of Computers/Tech Blogs

BlogCatalog

What is your engineeringlevel?

Expert

 Advanced

Intermediate

Novice

Votes so far: 0Poll closed

0 (0%)

  0 (0%)

  0 (0%)

  0 (0%)

Blog Information Profile for JTAG

 

There was an error in this gadget

information technology blog Online Marketing Bloggapedia, Blog Directory - Find It!Blog Listings

burtong  said...

More haste, less speed.............................................................

June 11, 2010 at 6:44 PM

Soumen Mishra said...

I have Samsung Star s5233a while i am upgrade my firmware usb unplug nowphone is dead please help.

please suggest to repair through usb.

Soumen Mishra

mob: 08093955481

October 10, 2011 at 2:30 AM

https://www.blogger.com/profile/01840409820161710288https://www.blogger.com/profile/07799682833224359763http://boundaryscan.blogspot.com/2010/04/tutorial-role-of-jtag-in-system-debug.html?showComment=1318239020493#c5424420115739806751https://www.blogger.com/profile/01840409820161710288http://boundaryscan.blogspot.com/2010/04/tutorial-role-of-jtag-in-system-debug.html?showComment=1276307043802#c1421468671927904215http://sg.av273.info/http://sexy.av273.info/http://room.av273.info/http://pub.av273.info/http://pretty.av273.info/http://play.av273.info/http://papa.av273.info/http://p2p.av273.info/http://ons.av273.info/http://nude.av273.info/http://no.av273.info/http://nice.av273.info/http://news.av273.info/http://net.av273.info/http://naked.av273.info/http://money.av273.info/http://momo.av273.info/http://model.av273.info/http://mm.av273.info/http://mkl.av273.info/http://meme.av273.info/http://mei.av273.info/http://max.av273.info/http://lv.av273.info/http://love.av273.info/http://log.av273.info/http://live.av273.info/http://kk.av273.info/http://kiss.av273.info/http://kiki.av273.info/http://jp.av273.info/http://jj.av273.info/http://hot.av273.info/http://honey.av273.info/http://hgame.av273.info/http://hchat.av273.info/http://hcg.av273.info/http://h.av273.info/http://gy.av273.info/http://great.av273.info/http://gosex.av273.info/http://good.av273.info/http://gogo.av273.info/http://good.i652.info/http://nice.i652.info/http://gogo.i652.info/http://1111.i652.info/http://104.i652.info/http://live173.i652.info/http://85st.i652.info/http://tawin.i652.info/http://landy.i652.info/http://girl.i652.info/http://playgirl.i652.info/http://showlive.i652.info/http://kk.i652.info/http://show.i652.info/http://talk.i652.info/http://live.i652.info/http://ut.i652.info/https://www.blogger.com/profile/07799682833224359763http://www.bloglisting.net/http://www.bloggapedia.com/http://www.ontoplist.com/http://galido.net/bloghttp://technorati.com/profile/JTAG?sub=tr_embed_t_jshttp://technorati.com/blogs/boundaryscan.blogspot.com?sub=tr_embed_t_jshttp://www.blogcatalog.com/directory/technologyhttp://dir.blogflux.com/cat/computers-tech.htmlhttp://www.corelis.com/products-bus-analyzers/SPI_Exerciser_BusPro-S.htmhttp://www.corelis.com/education/JTAG_Tutorial.htmhttp://en.wikipedia.org/wiki/Joint_Test_Action_Grouphttp://www.corelis.com/http://boundaryscan.blogspot.com/2008/11/ieee-standard.htmlhttp://www.corelis.com/products-bus-analyzers/Bus_Analyzer_I2C_Products_index.htmhttp://www.corelis.com/whitepapers/Boundary-Scan_DFT_Guidelines.pdfhttp://www.dftdigest.com/http://www.corelis.com/education/What-Is-JTAG.htmhttp://www.corelis.com/education/JTAG-Test-Overview.htmhttp://www.corelis.com/education/JTAG-Technical-Primer.htmhttp://www.corelis.com/education/JTAG_Tutorial.htmhttp://feedproxy.google.com/~r/ThinkTechie/~3/D478HBzAKts/how-to-host-and-manage-git-repositories.htmlhttp://www.think-techie.com/http://feedproxy.google.com/~r/TheDigitalElectronicsBlog/~3/xPOeLh1py-Y/e-book-access-moved-to-new-domain.htmlhttp://boundaryscan.blogspot.com/feeds/3907763704090743528/comments/defaulthttp://boundaryscan.blogspot.in/https://www.blogger.com/comment.g?blogID=4210622018534791720&postID=3907763704090743528https://www.blogger.com/email-post.g?blogID=4210622018534791720&postID=3907763704090743528http://boundaryscan.blogspot.in/2010/04/tutorial-role-of-jtag-in-system-debug.htmlhttps://www.blogger.com/profile/02902721147347877163http://embedded.com/columns/technicalinsights/211300344?pgno=1http://embedded.com/columns/technicalinsights/211300344?pgno=4http://embedded.com/columns/technicalinsights/211300344?pgno=3http://embedded.com/columns/technicalinsights/211300344?pgno=2http://embedded.com/columns/technicalinsights/211300344?pgno=1http://boundaryscan.blogspot.in/2010/03/embedded-world-2010.htmlhttp://boundaryscan.blogspot.in/2010/11/jtag-cables.html