HK & LVPS for EUSO –TA / -BalloonG. Medina-Tanco, L. Santiago, H. Silva Lopez,

F. Trillaud, C. Lopez, J. Rojas, A. De la Cruz, S. Guerrero, G. Leon

HK connections

HOUSE KEEPING

RS422

SPI

High Level Command &

Monitoring Signals

Analog to Digital Conversion

CPU

RS422-RS232converter SIREN

CCB

CLKB

GPS

PDMB

HVPS

SIREN [1 Open Drain output]

4 LVPS [4 Mon, 3 HL_Cmd]

LENSES

HK connections

HOUSE KEEPING

RS422

SPI

High Level Command &

Monitoring Signals

Analog to Digital Conversion

CPU

RS422-RS232converter SIREN

CCB

CLKB

GPS

PDMB

HVPS

SIREN [1 Open Drain output]

4 LVPS [4 Mon, 3 HL_Cmd]

LENSES

Of course not needed in TA, but still available comm-channel if comm with TA or independent remote access is required

Who turn HK on now?Anyway same protocol must be kept for HK On/Off.

HK Interfaces

HK module

Individual boards’ functionality:

PCB 05: LENSES, LVPS-PDM, LVPS-HK: (DC25-DB25).PCB 04: LVPS1-DP, LVPS2-DP: (DC37-DB25).PCB 03: SIREN-HK, CPU-HK, PDM-HK (DE9-DE9-DA15).PCB 02: CCB-HK, CLKB-HK: (DB25-DB25).PCB 01: POWER-HK, GPS-HK, HVPS-HK: (DE9-DA15-DA15).

HK module

Back-lid (profile from Giuseppe’s module/CAD)produced @ CCADET-UNAM

HK

LVPS

HK production status

Two HK’s were produced

Currently 3 students from UNAM are at Naples for HK+LVPS integration with DPDuration of mision 3 weeks

Module casing: delay of 3 days at production will arrive next week by DHL

HK module boards & Arduino

HK module boards & Arduino

HK Software

HK Software

• Software related to DP interfaces will be advanced during DP integration.

• HVPS we have a channel open & should not be a problem.

• PDMB there is nothing defined yet.

LVPS

LVPS System: 4 boards implemented in 4 separate modules in DP rack

Individual boards’ functionality:

LVPS-PDM: PDMB [ON/OFF: HK]LVPS1-DP: CCB, CLK, GPS [ON/OFF: HK]LVPS2-DP: CPU (& DS) [ON/OFF: HK]LVPS-HK: HK [ON/OFF: SIREN]

CURRENT Boards: input 28V NOT 110V

But 110 V are AC not DC, yes? So, No-break/batteries in between ? WHO do this?

Interface Power Consumption in W

for Power Pack1

Power Consumption (changes)

Power Consumption in W

for Power Pack2

IR Camera 22High Voltage Power

Supply 2 2

LVPS DP1 3.3 3.3 LVPS DP2 4.2 4.2

Housekeeping 6 6 LVPS-PDM 3.5 3.5

LVPS-HK 1.6 1.6 CPU 12 12 CCB 5 5

Data Storage 8 8 GPS 1 1 CLK 3 3

PDMB (FPGA) 7.2 8 PDMB-EC-ASIC 10 10

      Additional Spare 15 15

Heaters TBC  

Total 81.8 88.6 22

LVP consumption

LVPS-PDM

Current TA board does not work with PDM if those values for PDM are final But still the margin of tolerance must be confirmed

because it is too low: < 2%

128.4

50.5

101.7

6.9

26.2

19.3

4.65

DB25(HK_BOARD)

DE9(PWR_PDMB)

CONNECTORS ON LVPS_PDM FRONT PANEL

DE9(BATTERY)

92.4

10

Dimensiones en mm Área efectiva enmarcada por línea azul

53.04

30.81

12.5

5

12.5

5

0.36

0.36

0.36

24.33

10.39

128.4

50.5

101.7

6.9

26.2

19.3

4.65

DB25(HK_BOARD)

DA15(PWR_CPU)

CONNECTORS ON LVPS2_DP FRONT PANEL

DE9(BATTERY)

92.4

10

Dimensiones en mm Área efectiva enmarcada por línea azul

12.5

5

12.5

5

39.14

0.36

0.36

6.226.22

24.33

128.4

50.5

101.7

6.9

26.2

19.3

4.65

CONNECTORS ON LVPS_HK FRONT PANEL

92.4

Dimensiones en mm

DA15(HK_ON/OFF)

DE9(BATTERY)

10

DE9(HK_MON)

DE9(PWR_HKB)

10

Área efectiva enmarcada por línea azul

10.87 10.870.36

0.36

10.39

128.4

65.7

4

101.7

41.4

434.54

4.65

CONNECTORS ON LVPS1_DP FRONT PANEL

92.4

Dimensiones en mm

DE9(CCB)

DE9(CLKB)

6.9

DC37(HK_BOARD)

DE9(BATTERY)

DE9(GPSR)

Área efectiva enmarcada por línea azul

10

En esta opción se le agregaron lo de 3 divisiones = 5.08x3 = 15.24

69.32

30.81 30.81

12.5

512

.55

12.5

5

0.94

0.94

0.94

0.94

16.19 16.19

128.4

55.5

8

101.7

6.9

31.2

824.38

4.65

CONNECTORS ON LVPS_HK FRONT PANEL

92.4

Dimensiones en mm

DA15(HK_ON/OFF)

DE9(BATTERY)

10

DE9(HK_MON)

DE9(PWR_HKB)

10

Área efectiva enmarcada por línea azul

10.87 10.872.06

2.06

10.39

Agregar una subdivisión mas a los otros 3 submódulos sería otra opción = 50.5+5.08= 55.58

12.5

5

12.5

5

2.06

39.14

30.81

LVPS production status

1 LVPS set was produced

LVPS-PDM

PDM – Low Voltage Power Supply Board

DC-DC of FPGA-PDM

DC-DC of EC-ASIC

Latching Relay of PDM

Latching Relay of EC-ASIC

DC-DC to power monitoring circuit

Monitoring circuit(4 Operational

amplifier built-in chip)

Battery connector

Power connector(to load)

HK connector

HK – Low Voltage Power Supply Board

Dual output DC-DC for ±12V-HK

DC-DC for 3.3V-HKLatching Relay of 3.3-HK

Latching Relay of 12V-HK

DC-DC to power monitoring circuit

Monitoring circuit(4 Operational

amplifier built-in chip)

Battery connector

Power connector(to load)

HK connectorSIREN connector for Commands

DP – Low Voltage Power Supply Board #1

DC-DC for CCB

DC-DC for GPSR

Latching Relay of CCB

Monitoring circuit(6 Operational

amplifier TWO chips)

Battery connector

Power connectors(to load)

HK connector

To CCB

To CLKB

To GPSR

Latching Relay of CLKB

Latching Relay of GPSRDC-DC to power monitoring circuit

DC-DC for CLKB

DP – Low Voltage Power Supply Board #2

DC-DC for CPU

DC-DC for DTS

Latching Relay of DST

Latching Relay of CPU

DC-DC to power monitoring circuit

Monitoring circuit(4 Operational

amplifier built-in chip)

Battery connector

Power connector(to load)

HK connector