[Harvard CS264] 04 - Intermediate-level CUDA Programming

Lecture #4: Intermediate-level CUDA | February 15th, 2011

Nicolas Pinto (MIT, Harvard) pinto@mit.edu

Massively Parallel ComputingCS 264 / CSCI E-292

Administrivia

• HW1: due Fri 2/18/11 (this week)

• Projects: think about it, consult the staff

• New guest lecturers!

• Max Lin (Google), Kurt Messersmith et al. (Amazon), David Rich et al. (Microsoft)

During this course,

we’ll try to

and use existing material ;-)

“ ”

adapted for CS264

Todayyey!!

Outline

• CUDA Language & APIs (overview)

• Threading/Execution (cont’d)

• Memory/Communication (cont’d)

• Tools

• Libraries

Outline

• Tools

• Libraries

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CUDA APIs

API allows the host to manage the devicesAllocate memory & transfer dataLaunch kernels

High level of abstraction - start here!

More control, more verbose

(OpenCL: Similar to CUDA C Driver API)

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Outline

• Tools

• Libraries

Execution Model

Software Hardware

Threads are executed by thread processors

Thread

Thread Processor

Thread Block Multiprocessor

Thread blocks are executed on multiprocessors

Thread blocks do not migrate

Several concurrent thread blocks can reside on one multiprocessor - limited by multiprocessor resources (shared memory and register file)

Grid Device

A kernel is launched as a grid of thread blocks

Only one kernel can execute on a device at one time

Threading Hierarchy

Thread Batching

Kernel launches a grid of thread blocksThreads within a block cooperate via shared memory

Threads within a block can synchronize

Threads in different blocks cannot cooperate

Allows programs to transparently scale to different GPUs

Thread Block 0

Shared Memory

Thread Block 1

Shared Memory

Thread Block N-1

Shared Memory

Transparent Scalability

Kernel grid

Block 2 Block 3

Block 4 Block 5

Block 6 Block 7

Device Device

Block 0 Block 1 Block 2 Block 3

Block 4 Block 5 Block 6 Block 7

Block 0 Block 1

Block 2 Block 3

Block 4 Block 5

Block 6 Block 7

Block 0 Block 1

Hardware is free to schedule thread blocks on any processor

A kernel scales across parallel multiprocessors

Thread Arithmetic

Indexing Arrays: Example

In this example, the red entry would have an index of 21:

int index = threadIdx.x + blockIdx.x * M;

= 5 + 2 * 8;

blockIdx.x = 2

M = 8 threads/block

0 178 16 18 19 20 2121 3 4 5 6 7 109 11 12 13 14 15

Indexing Arrays: Example

In this example, the red entry would have an index of 21:

int index = threadIdx.x + blockIdx.x * M;

= 5 + 2 * 8;

blockIdx.x = 2

M = 8 threads/block

0 178 16 18 19 20 2121 3 4 5 6 7 109 11 12 13 14 15

Addition with Threads and Blocks

The blockDim.x is a built-in variable for threads per block:

int index= threadIdx.x + blockIdx.x * blockDim.x;

A combined version of our vector addition kernel to use blocks and threads:

__global__ void add( int *a, int *b, int *c ) {

int index = threadIdx.x + blockIdx.x * blockDim.x;

c[index] = a[index] + b[index];

So what changes in main() when we use both blocks and threads?

Control Flow

Control Flow Divergence

What happens if you have the following code?

!"#"$$#%&'()*+*,-,../*$01#.2

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Branch

Path A

Path B

Branch

Path A

Path B

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BranchBranch

Path A

Path C

Branch

Path B

for correctness (*)You might have to think about it for performance

Depends on your branch conditions

Performance drops off with the degree of divergence

!"#$%&'$&()*+,+-.- /0123%*!) 45...

%*!) 65...

Divergence

0 2 4 6 8 10 12 14 16 18

Performance

Divergence

Occupancy

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Outline

• Tools

• Libraries

Kernel Memory Access

Per-thread

Per-block

Per-device

ThreadRegisters

Local Memory

SharedMemory

...Kernel 0

...Kernel 1

GlobalMemory

On-chip

Off-chip, uncached

• On-chip, small

• Fast

• Off-chip, large

• Uncached

• Persistent across kernel launches

• Kernel I/O

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Per-block

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Local Memory

SharedMemory

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GlobalMemory

On-chip

Off-chip, uncached

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Global Memory

Per-device

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GlobalMemory

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• Linear Memory

• Texture Memory

• Constant Memory

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Constant Memory

Constants set by CPU, read by GPU

Each SM has 8kiB cache for constants

Optimized for broadcast

Accessing different elements forces serialisation

Can speed some calculations

Can relieve register pressure

Declared at file scope__constant__ float dc_myConst;

Set via cudaMemcpyToSymbol API callcudaMemcpyToSymbol( “dc_myConst”, 3.14f, sizeof(float) )

Accessed by name in kernel__global__ MyKernel( ... ) { .... float myVal = dc_myConst+1; ....}

Constant Memory

Textures

Textures are essentially look up tables

Can only be written by the host

Cached on each multiprocessor (8kiB)

Optimised for 2D spatial locality

Hardware interpolation possible

Limited precision

Can clamp or wrap at boundaries

Textures

Declaration and setup rather involved

See programming guide

Accessed in kernels via texture fetches:tex1D, tex2D, tex3D, etc.

Co-ordinates at texel centres

Have to take care when accessing elements

Textures

Can improve load coalescing from global memory

If whole texture fits in 8kiB cache, has grid lifetime

Clamping/wrapping can aid edge case handling

Have to test to determine benefits

General Principles

Memory access patterns are crucial

Even CPUs are typically memory bound

GPUs have 100x FP

Only 10x memory bandwidth

Have to keep the GPU busy

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3+ Gb/s

8 GB/s

25+ GB/s

160+ GB/sto

PC Architecture

modified from Matthew Bolitho

PCIe Transfers(first thing to optimize?)

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*Averaged observed bandwidth

Processing Flow

1. Copy input data from CPU memory to GPU memory

PCI Bus

Processing Flow

2. Load GPU program and execute,caching data on chip for performance

PCI Bus

Processing Flow

2. Load GPU program and execute,caching data on chip for performance

3. Copy results from GPU memory to CPU memory

PCI Bus

PCIe Transfers

PCIe 2.0 x16 bus has

Latency of 10 µs (observed)

Bandwidth of 8GB/s (theory), 5 GB/s (observed)

A lot of calculations can happen in these times

PCIe Transfers

PCIe transfers occur via DMA

GPU reads pages direct from CPU memory

Very bad if page gets moved mid-transfer

CUDA maintains internal pinned memory buffers

Used for cudaMemcpy calls

Data staged through these

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PCIe Transfers Optimization

PCIe bus is slow

Try to minimize transfers

Use pinned memory on host whenever possible

Try to perform copies asynchronously

Outline

• Tools

• Libraries

CUDA-GDB

Extended version of GDB with support for C for CUDA

Supported on Linux 32bit/64bit systems

Seamlessly debug both the host|CPU and device|GPU codeSet breakpoints on any source line or symbol nameSingle step executes only one warp except on sync threads Access and print all CUDA memory allocations, local, global, constant and shared vars.

Walkthrough example with sourcecode : CUDA-GDB manual

Linux GDB Integration with EMACS

Linux GDB Integration with DDD

CUDA-MemCheck

Detects/tracks memory errorsOut of bounds accessesMisaligned accesses (types must be aligned on their size)

Integrated into CUDA-GDBLinux and WinXPWin7 and Vista support coming

11©NVIDIA 2010

CUDA Driver Low-level Profiling support1. Set up environment variables

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2. Set up configuration fileFILE "config.txt":

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3. Run applicationED&%="FC@

4. View profiler output

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CUDA Visual Profiler - OverviewPerformance analysis tool to fine tune CUDA applications

Supported on Linux/Windows/Mac platforms

Functionality:

Execute a CUDA application and collect profiling data

Multiple application runs to collect data for all hardware performance counters

Profiling data for all kernels and memory transfers

Analyze profiling data

CUDA Visual Profiler data for kernels

CUDA Visual Profiler computed data for kernels

Instruction throughput: Ratio of achieved instruction rate to peak single issue instruction rate

Global memory read throughput (Gigabytes/second)

Global memory write throughput (Gigabytes/second)

Overall global memory access throughput (Gigabytes/second)

Global memory load efficiency

Global memory store efficiency

CUDA Visual Profiler data for memory transfers

Memory transfer type and direction(D=Device, H=Host, A=cuArray)

e.g. H to D: Host to Device

Synchronous / Asynchronous

Memory transfer size, in bytes

Stream ID

CUDA Visual Profiler data analysis viewsViews:

Summary table Kernel tableMemcopy table Summary plotGPU Time Height plotGPU Time Width plotProfiler counter plotProfiler table column plotMulti-device plotMulti-stream plot

Analyze profiler counters

Analyze kernel occupancy

CUDA Visual Profiler Misc.Multiple sessions

Compare views for different sessions

Comparison Summary plot

Profiler projects save & load

Import/Export profiler data (.CSV format)

Outline

• Tools

• Libraries

CUBLAS

CUBLASCUDA accelerated BLAS (Basic Linear Algebra Subprograms)

Create matrix and vector objects in GPU memory spaceFill objects with dataCall sequence of CUBLAS functionsRetrieve data from GPU (optionally)

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CUBLAS FeaturesSingle precision data:

Level 1 (vector-vector O(N) )Level 2 (matrix-vector O(N2) )Level 3 (matrix-matrix O(N3) )

Complex single precision data:Level 1CGEMM

Double precision data:Level 1: DASUM, DAXPY, DCOPY, DDOT, DNRM2, DROT, DROTM, DSCAL, DSWAP, ISAMAX, IDAMIN Level 2: DGEMV, DGER, DSYR, DTRSVLevel 3: ZGEMM, DGEMM, DTRSM, DTRMM, DSYMM, DSYRK, DSYR2K

CUBLAS Performance: CPU vs GPU

CUBLAS: CUDA 2.3, Tesla C1060 MKL 10.0.3: Intel Core2 Extreme, 3.00GHz

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Up to 2x average speedup over CUBLAS 3.1

Less variation in performancefor different dimensions vs. 3.1

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Average speedup of {S/D/C/Z}GEMM x {NN,NT,TN,TT}

MATLAB Interface

! 15+ functions! Up to 10x speedup

! Dense linear algebra! C/C++ & FORTRAN! 150+ Routines

GPU Accelerated Linear Algebra

Supercomputer Speeds

Performance 7x of

Partnership

Developed in partnership with NVIDIA

CULA (LAPACK for heterogeneous systems)

CULA - PerformanceSupercomputing Speeds

This graph shows the relative speed of many CULA functions when compared to

(Fermi) and an Intel Core i7 860. More at www.culatools.com

CUSPARSE

Sparse Matrix Performance: CPU vs. GPU

35xMultiplication of a sparse matrix by multiple vectors

"Non-transposed""Transposed"MKL 10.2

Average speedup across S,D,C,Z

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CUFFTCUFFT is the CUDA FFT libraryComputes parallel FFT on an NVIDIA GPU

Plan contains information about optimal configuration for a given transform.Plans can be persisted to prevent recalculation.Good fit for CUFFT because different kinds of FFTs require different thread/block/grid configurations.

CUFFT Features

1D, 2D and 3D transforms of complex and real-valued dataBatched execution for doing multiple 1D transforms in parallel1D transform size up to 8M elements2D and 3D transform sizes in the range [2,16384]In-place and out-of-place transforms for real and complex data.

CUFFT Example

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CUFFT Performance: CPU vs GPU

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Thrust

!   Programmer productivity !   Rapidly develop complex applications !   Leverage parallel primitives

!   Encourage generic programming !   Don’t reinvent the wheel !   E.g. one reduction to rule them all

!   High performance !   With minimal programmer effort

!   Interoperability !   Integrates with CUDA C/C++ code

Objectives

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PyCUDA

3rd party open source, written by Andreas Klöckner Exposes all of CUDA via Python bindingsCompiles CUDA on the fly

presents CUDA as an interpreted languageIntegration with numpyHandles memory management, resource allocationCUDA programs are Python strings

Metaprogramming modify source code on-the-flyLike a really complex pre-processor

http://mathema.tician.de/software/pycuda

PyCUDA Example! "#$%&' $()*+,-+&"./&0,1 )*+,20 "#$%&' $()*+,-,*'%"3"'4 "#$%&' 3*#$(56 ,0703*#$(-&,3+%#-&,3+38595:-0,1'($/83*#$(-%,'42:; ,<=$*070)*+,-#/#<,>>%)8,-1"?/90,-+'($/-"'/#1"?/:@ )*+,-#/#)$(<A'%+8,<=$*90,:BC #%+070)*+,-D%*&)/E%+*>/8FFF!G <<=>%H,><<0.%"+0+%*H>"I(8I>%,'0J,:!! K!2 "3'0"+L070'A&/,+M+L-L0N0'A&/,+M+L-(J5O!4 ,P0"+L0Q0J702-GIO!5 R!6 FFF:!; I*3)070#%+-=/'<I*3)'"%38F+%*H>"I(F:!@ I*3)8,<=$*90H>%)S785959!::!B!C ,<+%*H>/+0703*#$(-/#$'(<>"S/8,:2G )*+,-#/#)$(<+'%A8,<+%*H>/+90,<=$*:2! $&"3' ,<+%*H>/+22 $&"3' ,

CURAND

RNG Performance: CPU vs. GPU

SP DP SP DP

Uniform Normal

Generating 100K Sobol' Samples

CURAND 3.2MKL 10.2

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OpenVIDIA

Open source, supported by NVIDIA

Computer Vision Workbench (CVWB)

http://openvidia.sourceforge.net

GPU imaging & computer vision

Demonstrates most commonly used image processing primitives on CUDA

Demos, code & tutorials/information

OpenVIDIA

and many more...

References

• CUDA C Programming Guide

• CUDA C Best Practices Guide

• CUDA Reference Manual

• API Reference, PTX ISA 2.2

• CUDA-GDB User Manual

• Visual Profiler Manual

• User Guides: CUBLAS, CUFFT, CUSPARSE, CURAND

http://developer.nvidia.com/object/gpucomputing.html

iPhD one more thingor two...

Life/Code Hacking #2.xSpeed {listen,read,writ}ing

accelerated e-learning (c) / massively parallel {learn,programm}ing (c)

Life/Code Hacking #2.1Speed listening

• Step 1: Collect

• online videos, tutorials, podcasts, etc.

• audiobooks

• youtube-dl, get_flash_videos, jDownloader, ffmpeg, mplayer, etc.

• etc.

• Step 2: Accelerate (time-stretch)

• VLC (Playback > Faster)

• sox $f{,.1.8X.mp3} tempo 1.8 50

• iPod ? mp3splt -t 5.00 -o small-@n large.mp3

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[Harvard CS264] 04 - Intermediate-level CUDA Programming

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Transcript of [Harvard CS264] 04 - Intermediate-level CUDA Programming

[Harvard CS264] 10a - Easy, Effective, Efficient: GPU Programming in Python with PyOpenCL and PyCUDA (Andreas Kloeckner, NYU)

CUDA Lecture 7 CUDA Threads and Atomics

Debugging Your CUDA Applications With CUDA-GDBdeveloper.download.nvidia.com/GTC/PDF/1062_Satoor.pdf · Debugging Solutions CUDA-GDB (Linux & Mac) CUDA-MEMCHECK (Linux, Mac, & Windows)

cs264: Program Analysis catalog name: Implementation of Programming Languages

[Harvard CS264] 06 - CUDA Ninja Tricks: GPU Scripting, Meta-programming & Auto-tuning

CUDA Compiler Driver NVCC - Nvidiadocs.nvidia.com/cuda//pdf/CUDA_Compiler_Driver_NVCC.pdf · CUDA Compiler Driver NVCC TRM-06721-001_v9.1 ... CUDA Programming Model ... 3.1. Command

CUDA Without Cuda (CUDA Libraries) - Nvidiadeveloper.download.nvidia.com/CUDA/training/ntrotoCUDALibraries.pdf · CUDA Without Cuda (CUDA Libraries) GPU Computing Webinar 7/16/2011

[Harvard CS264] 15a - Jacket: Visual Computing (James Malcolm, Accelereyes)

[Harvard CS264] 10b - cl.oquence: High-Level Language Abstractions for Low-Level Programming (Cyrus Omar, CMU)

CUDA-GDB (NVIDIA CUDA Debugger)

[Harvard CS264] 07 - GPU Cluster Programming (MPI & ZeroMQ)

GPUDIRECT, CUDA AWARE MPI, & CUDA IPC...Steve Abbott, Summit Training Workshop, December 2018 GPUDIRECT, CUDA AWARE MPI, & CUDA IPC

MD-CUDA · GPGPU CUDA N-body problem ... –Application programming interface (API) –CUDA runtime –CUFFT –CUBLAS. 20 CUDA Layers. 21 GPU Architecture In CUDA Memory Addressing

GPU Computing with CUDA Lecture 2 - CUDA · PDF fileGPU Computing with CUDA Lecture 2 - CUDA Memories ... August, 2011 UTFSM, Valparaíso, Chile 1. ... Memory hierarchy ‣CUDA works

[Harvard CS264] 11b - Analysis-Driven Performance Optimization with CUDA (Cliff Woolley, NVIDIA)

CUDA programming Performance considerations (CUDA best practices) NVIDIA CUDA C programming best practices guide ACK: CUDA teaching center Stanford (Hoberrock.

CUDA Lecture 4 CUDA Programming Basics

Debugging Experience with CUDA-GDB and CUDA ......2 CUDA Debugging Solutions CUDA-GDB (Linux & Mac) CUDA-MEMCHECK (Linux, Mac, & Windows) NVIDIA® Nsight Eclipse Edition (NEW!)Visual

[Harvard CS264] 15a - The Onset of Parallelism, Changes in Computer Architecture and Microsoft's Role in the Transition (David Rich, Microsoft Research)

[Harvard CS264] 08a - Cloud Computing, Amazon EC2, MIT StarCluster (Justin Riley, MIT)