Post on 23-Jan-2021
2018 Microchip Technology Inc. DS50002797A
EVB-KSZ9893Evaluation Board
User’s Guide
DS50002797A-page 2 2018 Microchip Technology Inc.
Note the following details of the code protection feature on Microchip devices:
• Microchip products meet the specification contained in their particular Microchip Data Sheet.
• Microchip believes that its family of products is one of the most secure families of its kind on the market today, when used in the intended manner and under normal conditions.
• There are dishonest and possibly illegal methods used to breach the code protection feature. All of these methods, to our knowledge, require using the Microchip products in a manner outside the operating specifications contained in Microchip’s Data Sheets. Most likely, the person doing so is engaged in theft of intellectual property.
• Microchip is willing to work with the customer who is concerned about the integrity of their code.
• Neither Microchip nor any other semiconductor manufacturer can guarantee the security of their code. Code protection does not mean that we are guaranteeing the product as “unbreakable.”
Code protection is constantly evolving. We at Microchip are committed to continuously improving the code protection features of ourproducts. Attempts to break Microchip’s code protection feature may be a violation of the Digital Millennium Copyright Act. If such actsallow unauthorized access to your software or other copyrighted work, you may have a right to sue for relief under that Act.
Microchip received ISO/TS-16949:2009 certification for its worldwide headquarters, design and wafer fabrication facilities in Chandler and Tempe, Arizona; Gresham, Oregon and design centers in California and India. The Company’s quality system processes and procedures are for its PIC® MCUs and dsPIC® DSCs, KEELOQ® code hopping devices, Serial EEPROMs, microperipherals, nonvolatile memory and analog products. In addition, Microchip’s quality system for the design and manufacture of development systems is ISO 9001:2000 certified.
QUALITYMANAGEMENTSYSTEMCERTIFIEDBYDNV
== ISO/TS16949==
Information contained in this publication regarding device applications and the like is provided only for your convenience and may besuperseded by updates. It is your responsibility to ensure that your application meets with your specifications. MICROCHIP MAKES NOREPRESENTATIONS OR WARRANTIES OF ANY KIND WHETHER EXPRESS OR IMPLIED, WRITTEN OR ORAL, STATUTORY OROTHERWISE, RELATED TO THE INFORMATION, INCLUDING BUT NOT LIMITED TO ITS CONDITION, QUALITY, PERFORMANCE,MERCHANTABILITY OR FITNESS FOR PURPOSE. Microchip disclaims all liability arising from this information and its use. Use of Micro-chip devices in life support and/or safety applications is entirely at the buyer’s risk, and the buyer agrees to defend, indemnify and holdharmless Microchip from any and all damages, claims, suits, or expenses resulting from such use. No licenses are conveyed, implicitly orotherwise, under any Microchip intellectual property rights unless otherwise stated.
Trademarks
The Microchip name and logo, the Microchip logo, AnyRate, AVR, AVR logo, AVR Freaks, BitCloud, chipKIT, chipKIT logo, CryptoMemory, CryptoRF, dsPIC, FlashFlex, flexPWR, Heldo, JukeBlox, KeeLoq, Kleer, LANCheck, LINK MD, maXStylus, maXTouch, MediaLB, megaAVR, MOST, MOST logo, MPLAB, OptoLyzer, PIC, picoPower, PICSTART, PIC32 logo, Prochip Designer, QTouch, SAM-BA, SpyNIC, SST, SST Logo, SuperFlash, tinyAVR, UNI/O, and XMEGA are registered trademarks of Microchip Technology Incorporated in the U.S.A. and other countries.
ClockWorks, The Embedded Control Solutions Company, EtherSynch, Hyper Speed Control, HyperLight Load, IntelliMOS, mTouch, Precision Edge, and Quiet-Wire are registered trademarks of Microchip Technology Incorporated in the U.S.A.
Adjacent Key Suppression, AKS, Analog-for-the-Digital Age, Any Capacitor, AnyIn, AnyOut, BodyCom, CodeGuard, CryptoAuthentication, CryptoAutomotive, CryptoCompanion, CryptoController, dsPICDEM, dsPICDEM.net, Dynamic Average Matching, DAM, ECAN, EtherGREEN, In-Circuit Serial Programming, ICSP, INICnet, Inter-Chip Connectivity, JitterBlocker, KleerNet, KleerNet logo, memBrain, Mindi, MiWi, motorBench, MPASM, MPF, MPLAB Certified logo, MPLIB, MPLINK, MultiTRAK, NetDetach, Omniscient Code Generation, PICDEM, PICDEM.net, PICkit, PICtail, PowerSmart, PureSilicon, QMatrix, REAL ICE, Ripple Blocker, SAM-ICE, Serial Quad I/O, SMART-I.S., SQI, SuperSwitcher, SuperSwitcher II, Total Endurance, TSHARC, USBCheck, VariSense, ViewSpan, WiperLock, Wireless DNA, and ZENA are trademarks of Microchip Technology Incorporated in the U.S.A. and other countries.
SQTP is a service mark of Microchip Technology Incorporated in the U.S.A.
Silicon Storage Technology is a registered trademark of Microchip Technology Inc. in other countries.
GestIC is a registered trademark of Microchip Technology Germany II GmbH & Co. KG, a subsidiary of Microchip Technology Inc., in other countries.
All other trademarks mentioned herein are property of their respective companies.
© 2018, Microchip Technology Incorporated, All Rights Reserved.
ISBN: 978-1-5224-3463-4
EVB-KSZ9893EVALUATION BOARD
USER’S GUIDE
Table of Contents
Preface ........................................................................................................................... 5Introduction............................................................................................................ 5
Document Layout .................................................................................................. 5
Conventions Used in this Guide ............................................................................ 6
The Microchip Website.......................................................................................... 7
Development Systems Customer Change Notification Service ............................ 7
Customer Support ................................................................................................. 7
Document Revision History ................................................................................... 8
Chapter 1. Overview1.1 Introduction ..................................................................................................... 91.2 References ................................................................................................... 11
Chapter 2. Getting Started2.1 Introduction ................................................................................................... 132.2 Power Source ............................................................................................... 13
2.2.1 Power Probe Points ................................................................................... 132.2.2 Current Access Rework/Probe Points ....................................................... 13
2.3 Clock ............................................................................................................ 132.4 RESET ......................................................................................................... 14
2.4.1 Power-On Reset ........................................................................................ 142.4.2 Manual Reset ............................................................................................ 14
2.5 Board features and configuration ................................................................. 142.5.1 PHY Ports – Integrated Magnetic Jacks .................................................... 162.5.2 PHY Ports – LEDs ..................................................................................... 162.5.3 Pin Strapping Configuration ...................................................................... 162.5.4 GPIO Signal Headers ................................................................................ 172.5.5 INTRP_N Output ....................................................................................... 172.5.6 PME_N Output .......................................................................................... 17
2.6 Using the EVB-KSZ9893 .............................................................................. 18
Appendix A. EVB-KSZ9893 Evaluation BoardA.1 Introduction .................................................................................................. 19
Appendix B. SchematicsB.1 Introduction .................................................................................................. 21
Appendix C. Bill of Materials (BOM)C.1 Introduction .................................................................................................. 25
Appendix D. Silk ScreenD.1 Introduction .................................................................................................. 29
Worldwide Sales and Service .................................................................................... 32
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Preface
INTRODUCTION
This chapter contains general information that will be useful to know before using the EVB-KSZ9893 evaluation board. Items discussed in this chapter include:
• Document Layout
• Conventions Used in this Guide
• The Microchip Website
• Development Systems Customer Change Notification Service
• Customer Support
• Document Revision History
DOCUMENT LAYOUT
This document describes how to use the EVB-KSZ9893 evaluation board as a development tool for the KSZ9893, a 3-Port Gigabit Ethernet Switch with RGMII Interface and IEEE 1588v2/802.1AS support.
• Chapter 1. “Overview” – This chapter provides a brief description of the EVB-KSZ9893.
• Chapter 2. “Getting Started” – This chapter includes instructions on how to get started with the EVB-KSZ9893.
• Appendix A. “EVB-KSZ9893 Evaluation Board” – This appendix shows the physical EVB-KSZ9893.
• Appendix B. “Schematics” – This appendix shows the EVB-KSZ9893 schemat-ics.
• Appendix C. “Bill of Materials (BOM)” – This appendix includes the EVB-KSZ9893 Bill of Materials (BOM).
• Appendix D. “Silk Screen” – This appendix includes the EVB-KSZ9893 silk screen.
NOTICE TO CUSTOMERS
All documentation becomes dated, and this manual is no exception. Microchip tools and documentation are constantly evolving to meet customer needs, so some actual dialogs and/or tool descriptions may differ from those in this document. Please refer to our website (www.microchip.com) to obtain the latest documentation available.
Documents are identified with a “DS” number. This number is located on the bottom of each page, in front of the page number. The numbering convention for the DS number is “DSXXXXXA”, where “XXXXX” is the document number and “A” is the revision level of the document.
For the most up-to-date information on development tools, see the MPLAB® IDE online help. Select the Help menu, and then Topics to open a list of available online help files.
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CONVENTIONS USED IN THIS GUIDE
This manual uses the following documentation conventions:
DOCUMENTATION CONVENTIONS
Description Represents Examples
Arial font:
Italic characters Referenced books MPLAB® IDE User’s Guide
Emphasized text ...is the only compiler...
Initial caps A window the Output window
A dialog the Settings dialog
A menu selection select Enable Programmer
Quotes A field name in a window or dialog
“Save project before build”
Underlined, italic text with right angle bracket
A menu path File>Save
Bold characters A dialog button Click OK
A tab Click the Power tab
N‘Rnnnn A number in verilog format, where N is the total number of digits, R is the radix and n is a digit.
4‘b0010, 2‘hF1
Text in angle brackets < > A key on the keyboard Press <Enter>, <F1>
Courier New font:
Plain Courier New Sample source code #define START
Filenames autoexec.bat
File paths c:\mcc18\h
Keywords _asm, _endasm, static
Command-line options -Opa+, -Opa-
Bit values 0, 1
Constants 0xFF, ‘A’
Italic Courier New A variable argument file.o, where file can be any valid filename
Square brackets [ ] Optional arguments mcc18 [options] file [options]
Curly brackets and pipe character: { | }
Choice of mutually exclusive arguments; an OR selection
errorlevel {0|1}
Ellipses... Replaces repeated text var_name [, var_name...]
Represents code supplied by user
void main (void){ ...}
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Preface
THE MICROCHIP WEBSITE
Microchip provides online support via our website at www.microchip.com. This website is used as a means to make files and information easily available to customers. Acces-sible by using your favorite Internet browser, the website contains the following infor-mation:
• Product Support – Data sheets and errata, application notes and sample programs, design resources, user’s guides and hardware support documents, latest software releases, and archived software
• General Technical Support – Frequently Asked Questions (FAQs), technical support requests, online discussion groups, and Microchip consultant program member listing
• Business of Microchip – Product selector and ordering guides, latest Microchip press releases, listing of seminars and events, and listings of Microchip sales offices, distributors, and factory representatives
DEVELOPMENT SYSTEMS CUSTOMER CHANGE NOTIFICATION SERVICE
Microchip’s customer notification service helps keep customers current on Microchip products. Subscribers will receive e-mail notification whenever there are changes, updates, revisions or errata related to a specified product family or development tool of interest.
To register, access the Microchip website at www.microchip.com, click on Customer Change Notification and follow the registration instructions.
The Development Systems product group categories are:• Compilers – The latest information on Microchip C compilers, assemblers, linkers
and other language tools. These include all MPLAB C compilers; all MPLAB assemblers (including MPASM assembler); all MPLAB linkers (including MPLINK object linker); and all MPLAB librarians (including MPLIB object librarian).
• Emulators – The latest information on Microchip in-circuit emulators.This includes the MPLAB® REALICE and MPLAB ICE 2000 in-circuit emulators.
• In-Circuit Debuggers – The latest information on the Microchip in-circuit debuggers. This includes MPLAB ICD 3 in-circuit debuggers and PICkit 3 debug express.
• MPLAB IDE – The latest information on Microchip MPLAB IDE, the Windows Integrated Development Environment for development systems tools. This list is focused on the MPLAB IDE, MPLAB IDE Project Manager, MPLAB Editor and MPLAB SIM simulator, as well as general editing and debugging features.
• Programmers – The latest information on Microchip programmers, which include production programmers such as MPLAB REAL ICE in-circuit emulator, MPLAB ICD 3 in-circuit debugger, and MPLAB PM3 device programmers. Also included are non-production development programmers such as PICSTART Plus and PIC-kit 2 and 3.
CUSTOMER SUPPORT
Users of Microchip products can receive assistance through several channels:
• Distributor or Representative
• Local Sales Office
• Field Application Engineer (FAE)
• Technical Support
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EVB-KSZ9893 Evaluation Board User’s Guide
Customers should contact their distributor, representative or field application engineer (FAE) for support. Local sales offices are also available to help customers. A listing of sales offices and locations is included in the back of this document.
Technical support is available through the website at: http://www.microchip.com/support
DOCUMENT REVISION HISTORY
Revisions Section/Figure/Entry Correction
DS50002797A (08-24-18)
Initial release
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USER’S GUIDE
Chapter 1. Overview
1.1 INTRODUCTION
The EVB-KSZ9893 evaluation board is a plug-in card that interfaces directly with a mat-ing Microchip host processor or controller board, such as the SAMA5D3 EthernetDevelopment System (EDS) board. It features the KSZ9893, a highly integrated net-working device that incorporates a layer-2+ managed Gigabit Ethernet switch, two10BASE-T/100BASE-TX/ 1000BASE-T physical layer transceivers (PHYs) and asso-ciated MAC units, and one MAC port configured as the RGMII interface. The board’stwo PHY ports are connected to RJ45 Ethernet jacks with integrated magnetics, andthe RGMII MAC interface is brought out to a high-speed multi-pin (HS) connector.
Together, the EVB-KSZ9893 and the SAMA5D3-EDS provide a highly-flexible platformfor evaluation of basic PHY/Switch features via static Control-Status Registers (CSRs)and development of firmware for advanced MAC/Switch features that require interac-tion with upper network layers (for example, IEEE1588 PTP, AVB, and RSTP/MSTP).
The scope of this document is meant to describe the EVB-KSZ9893 setup and its userinterface features. A simplified block diagram of the board is shown in Figure 1-1.
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AVDDL core
DVDDL core
KSZ9 3RNX Power Rails
AVDDH (transceiver)
VDDIO (digital pins)
Buck Regulator1.2V adjustable output
POR
T_3
V3_Samtec
V5_Samtec (option)
VARIO_Samtec
3-EDS Board
FIGURE 1-1: EVB-KSZ9893 FUNCTIONAL BLOCK DIAGRAM
OSC(option)
10Base-T / 100Base-TX /1000Base-T
RJ-45 Magnetic JackPOR
T_1
POR
T_2
Port StatusDual-LEDIndicator
4 TX / RX pairs
4 TX / RX pairs
KSZ9893RNX
64-pin QFN
25 MHz XTAL
MMCXConnector
XI pin
RESETRC/Diode(default)Port Status
Dual-LEDIndicator
MMCXConnector
GPIO pins for AVB/1588
RESET_N MII
/ RM
II / R
GM
II Po
rt C
onne
ctor
PHY
mod
e (b
otto
m P
CB
mou
nt)
Sam
tec
QTS
-050
-01-
L-D
-A-G
P
INTRP_N
SPI / I2C / MDC/MDIO
RGMII / RMII / MII signals
Pin Strappings(pu/pd steering resistors)
10Base-T / 100Base-TX /1000Base-T
RJ-45 Magnetic Jack
PME_N
5V_Samtec
3
2
25MHz REFCLK
Plug-in to SAMA5D
Overview
1.2 REFERENCES
Concepts and materials available in the following documents may be helpful when reading this document. Visit www.microchip.com for the latest documentation.
• KSZ9893 Data Sheet
• EVB-KSZ9893 Schematics
• SAMA5D3 Ethernet Development System Schematics
• SAMA5D3 Ethernet Development System Board User’s Guide
• MIC33153YHJ Data Sheet
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Chapter 2. Getting Started
2.1 INTRODUCTION
The EVB-KSZ9893 evaluation board is designed as a plug-in card to interface directlywith a mating Microchip host processor or controller board, such as theSAMA5D3-EDS Board, that supplies full power and provides full register access andconfiguration via In-Band Management Access (IBA), SPI, or I2C bus management.
2.2 POWER SOURCE
The EVB-KSZ9893 is completely bus-powered from its mating Microchip host proces-sor or controller board. Input power is delivered via the high-speed multi-pin (HS) con-nector.
Refer to Figure 2-3 and board schematics in Appendix B. “Schematics” for details.
2.2.1 Power Probe Points
The power probe points along with the ground test points are shown in Figure 2-2.
2.2.2 Current Access Rework/Probe Points
The EVB-KSZ9893 design is not intended to perform current measurements on the device. If needed, the current access points to measure the current consumptions of the KSZ9893 power rails are across the following series ferrite beads to the board pow-ers.
• DVDDL: FB2
• AVDDL: FB3
• VDDIO: FB6
• AVDDH: FB4 for 3.3V (default populate) and FB1 for 2.5V (default not populate)
Remove the above ferrite beads and place the current probes in series across the power probe points (Section 2.2.1 “Power Probe Points”) that are joined by the fer-rite beads. See also Appendix B. “Schematics”.
Board LED components are connected to the VDDIO power rail, and thus the mea-sured current is higher than the amount consumed by only the KSZ9893 device.
2.3 CLOCK
The EVB-KSZ9893 utilizes a 25 MHz crystal to generate the input reference clock forthe KSZ9893 device. Refer to Figure 2-1 and the board schematics in AppendixB. “Schematics” for details.
Note: Populate either FB4 only or FB1 only. If 2.5V AVDDH is desired, FB4 should be “Do Not Populate (DNP)” and FB1 should be populated.
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2.4 RESET
2.4.1 Power-On Reset
The discrete RC/Diode (R12, C8, and D3) circuit provides power-on reset to the KSZ9893 device.
2.4.2 Manual Reset
The SW1 reset button can be pressed and released to provide manual reset to the KSZ9893 device after power-up. Refer to Figure 2-1 and the board schematics in Appendix B. “Schematics” for details.
2.5 BOARD FEATURES AND CONFIGURATION
The following sub-sections describe the board features and configuration settings.
Figure 2-1 displays the top view of the EVB-KSZ9893 with key features, jumpers, and headers which are highlighted in red. The Microchip components are highlighted in blue.
FIGURE 2-1: EVB-KSZ9893 TOP VIEW WITH CALLOUTS
PHY Port 1LED Status
IBA Mode(pin strapping)
SW1(reset button)
GPIO signals(for 1588/AVB)
Quiet-WIRE(pin strapping)
INTRP_N output(signal/LED)
PME_N output(signal/LED)
PHY Port 110/100/1000
Magnetic Jack
PHY Port 210/100/1000
Magnetic Jack
Microchip KSZ9893 3-port Gigabit Ethernet SwitchMicrochip MIC33153YHJ
Buck Regulator5V Power LED (from HS connector, J7)
PHY Port 2LED Status
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Getting Started
Figure 2-2 displays the power probe points along with the ground test points.
FIGURE 2-2: EVB-KSZ9893 POWER/GROUND CALLOUTS
Ground (TP4)
AVDDH rail of KSZ9893 (TP5)
VARIO from HS_Connector, J7 (TP3) 2V5 from HS_Connector, J7
(TP6)
3V3 from HS_Connector, J7(TP9)
VDDIO rail of KSZ9893(TP11)
Ground (TP7)
5V from HS_Connector, J7(TP2)
Ground (TP20)
DVDDL rail of KSZ9893(TP10)
AVDDL rail of KSZ9893(TP12)
1.2V Output of MIC33153YHJ Buck Regulator (TP8)
Ground(TP18)
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Figure 2-3 displays the bottom view of the EVB-KSZ9893 with the HS connector (J7) (highlighted in red) directly plugging into a mating Microchip MAC processor or control-ler board.
FIGURE 2-3: EVB-KSZ9893 BOTTOM VIEW WITH CALLOUT
2.5.1 PHY Ports – Integrated Magnetic Jacks
PHY ports 1 and 2 (J2 and J6) support 10BASE-T/100BASE-TX/1000BASE-T withboth Auto-negotiation enabled and Auto-MDI/MDI-X enabled as the power-up defaults.
2.5.2 PHY Ports – LEDs
Two Dual-LEDs (D2 and D6) provide the link status for PHY ports 1 and 2, respectively. The LED descriptions are listed in Table 2-1.
2.5.3 Pin Strapping Configuration
As the power-up or reset defaults, the KSZ9893 device is configured via internal or external pull-up or pull-down resistors to the following settings:
• PHY Ports 1 and 2: Auto-negotiation enabled and Energy-Efficient Ethernet (EEE) enabled
• MAC Port 3: RGMII mode at 1000 Mbps speed
• Start Switch: The switch forwards packets immediately after hardware reset.
• Management: SPI Slave mode
TABLE 2-1: PHY PORTS - LED DESCRIPTION
LED LED Color Description
D2, D6
Green Solid color: 1-Gbps LinkBlinking: Activity (RX, TX)
Red Solid color: 100-Mbps LinkBlinking: Activity (RX, TX)
Orange Solid color: 10-Mbps LinkBlinking: Activity (RX, TX)
Off Link off
High-speed connector to MAC processor/
controller board
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Getting Started
The IBA mode and Quiet-Wire® pin strappings can be enabled or disabled using the 3-pin jumpers in Table 2-2. Set the desired jumper settings prior to board power-up, hardware reset, or both.
Refer to the board schematics in Appendix B. “Schematics” and the KSZ9893 Data Sheet for further details on the pin strappings.
2.5.4 GPIO Signal Headers
Table 2-3 shows the GPIO signals that support the IEEE 1588 Precision Time Protocol (PTP).
Refer to the board schematics in Appendix B. “Schematics” and the KSZ9893 Data Sheet for further details and usage on the GPIO signal pins.
2.5.5 INTRP_N Output
The INTRP_N output at test point TP14 provides the interrupt output from the KSZ9893 device. By default, it is active low and drives low to turn on D4 when asserted.
Refer to the board schematics in Appendix B. “Schematics” and the KSZ9893 Data Sheet for further details and usage on the INTRP_N signal.
2.5.6 PME_N Output
The PME_N output at test point TP16 provides the Power Management Event (PME) interrupt output for Wake-on-LAN (WoL) from the KSZ9893 device. By default, it is active low and drives low to turn on D5 when asserted.
Refer to the board schematics in Appendix B. “Schematics” and the KSZ9893 Data Sheet for further details and usage on the PME_N signal.
TABLE 2-2: PIN STRAPPING JUMPERS
Jumper Label DescriptionClose Pins
1-2Close Pins
2-3
J1 IBA mode IBA provides full register read and write access via any one of the three data ports.
Disable Enable(default)
J5 Quiet-Wire Quiet-Wire filtering is implemented on-chip to enhance 100BASE-TX EMC performance by reducing both conducted and radiated emissions from the TXP/M signal differential pair.
Enable Disable(default)
TABLE 2-3: GPIO SIGNAL HEADERS
Header Label Description Pin 1 Pin 2
J1 GPIO_2 The GPIO_2 pin is configurable to implement IEEE1588 event trigger outputs and timestamp capture inputs to support real-time application requirements.
No Connect GPIO_2(KSZ9893 pin 40)
J5 GPIO_1 The GPIO_1 pin is configurable to implement IEEE1588 event trigger outputs and timestamp capture inputs to support real-time application requirements.
Ground GPIO_1(KSZ9893 pin 39)
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2.6 USING THE EVB-KSZ9893
The EVB-KSZ9893 directly plugs into a mating Microchip host controller or processorboard, such as the SAMA5D3-EDS Board, that delivers full power and provides full reg-ister access and configuration via IBA, SPI, or I2C bus management.
Together, the EVB-KSZ9893 and the SAMA5D3-EDS enable 10/100/1000-MbpsEthernet traffic switching across all three data ports of the KSZ9893 device, with RGMIIMAC Port 3 connecting to the SAMA5D3 processor and PHY Port 1 and Port 2 con-necting via copper Ethernet cable (CAT-5 UTP or better) to external Ethernet devices.
All KSZ9893 registers are accessible via IBA, SPI, or I2C bus management from theSAMA5D3-EDS Board, enabling full evaluation and firmware development for allKSZ9893 MAC/Switch features and interaction with upper network layers.
Refer to the SAMA5D3-EDS Board documentation on its usage.
Figure 2-4 shows the EVB-KSZ9893 connected to the SAMA5D3-EDS Board.
FIGURE 2-4: EXAMPLE OF EVALUATION BOARD CONNECTED TO SAMA5D3-EDS
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Appendix A. EVB-KSZ9893 Evaluation Board
A.1 INTRODUCTION
This appendix shows the EVB-KSZ9893 evaluation board. See Figure A-1 and Figure A-2.
FIGURE A-1: EVB-KSZ9893 EVALUATION BOARD (TOP VIEW)
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FIGURE A-2: EVB-KSZ9893 EVALUATION BOARD (BOTTOM VIEW)
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Appendix B. Schematics
B.1 INTRODUCTION
This appendix includes the EVB-KSZ9893 evaluation board schematics. See Figure B-1, Figure B-2, and Figure B-3.
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ESET
INTRP_N
PME_N
"INTRP_N"
"PME_N"
VDDIO
470R
R20
470R
R43
4.7kR51
4.7kR50
VDDIO
tions.
lt values);
al values.
set in Register 0x0_3_00.
t.
le (default)
s, Full-duplex mode), and
s, Full-duplex mode), and
VDDIO
MBD914Reset
RXD3_U1
RXD2_U1
RXD1_U1
RXD0_U1
RX_ER_U1
SDO_PU
4.7kR29
4.7kR36
4.7kR39
4.7kR42
4.7k DNPR34
4.7kR17
LED1_0 4.7k DNPR2
LED1_1_PU
LED2_0
LED2_1
PME_N
4.7kR7
4.7k DNPR35
4.7k DNPR27
4.7k DNPR52
RXD3_U1
RXD2_U1
RXD1_U1
RXD0_U1
RX_ER_U1
SDO_PD
RX_DV_U1
LED1_0
LED1_1_PD
LED2_0
LED2_1
PME_N
750R DNPR3
750RR10
750RR33
750RR28
750R DNPR38
750RR44
750R DNPR30
750R DNPR31
750R DNPR40
750R DNPR41
750RR37
750RR16
1, x
0, 1
0, 0
Management ModeRXD1, RXD0
I2C Slave
MDC/MDIO (default)
SPI Slave
1
0
IBA ModeLED1_1
Disable
Enable (default)
1
0
Quiet-WIRESDO
Enable
Disable (default)
*2-3Quiet-WIRE
SDO_PD
SDO_PUSDO
GREEN
D4
GREEN
D5
12
3
J5
TP14
TP16
1 4
2 3
SPST-NO
SW1
Place across pins 2 and 3of Quiet-WIRE Header
Shunt 2.54mm 1x2
SH2
FIGURE B-1: EVB-KSZ9893 SCHEMATICS – KSZ9893 DEVICE, PIN STRAPPING, CLOCK, AND R
AVDDH
TXRX1B_PTXRX1B_NTXRX1C_PTXRX1C_N
TXRX1D_PTXRX1D_N
TXRX2A_PTXRX2A_N
TXRX2B_PTXRX2B_NTXRX2C_PTXRX2C_N
AVDDL
TXR
X2D
_PTX
RX2
D_N
TXRX1B_P3TXRX1B_N3TXRX1C_P3TXRX1C_N3
TXRX1D_P3TXRX1D_N3
TXRX2A_P3TXRX2A_N3
TXRX2B_P3TXRX2B_N3TXRX2C_P3TXRX2C_N3
TXRX2D_PTXRX2D_N
TXRX2D_P3TXRX2D_N3
TXRX1A_PTXRX1A_N
TXRX1A_P3TXRX1A_N3
VDDIO
DVDDL
RXD
3_U
1R
XD2_
U1
RXD
1_U
1R
XD0_
U1
TXD
3TX
D2
TXD
1TX
D0
RX_
ER_U
1R
X_D
V_U
1
RX_
CLK
_U1
SDI_SDA_MDIOSDORESET_NINTRP_NPME_NLED2_1LED2_0
GPIO_2GPIO_1
TX_ERTX_EN
TX_CLK
SDI_SDA_MDIO 3SDO 3
INTRP_N 3PME_N 3LED2_1 3LED2_0 3
TX_ER 3TX_EN 3
TX_CLK 3
TXD0 3TXD1 3TXD2 3TXD3 3
RX_CLK 3
RXD0 3RXD1 3RXD2 3RXD3 3
RX_ER 3
RX_DV 3
TXD0TXD1TXD2TXD3
RXD0RXD1RXD2RXD3
RX_DV
RX_CLK
RX_ER
SCS_
NSC
L_M
DC
ISET
TXR
X1A_
NTX
RX1
A_P
XI XO LED
1_0
LED
1_1
SCL_MDC 3SCS_N 3
SCL_MDCSCS_N
LED1_1 3LED1_0 3
LED1_1LED1_0
6.04k1%
R49
External Reference Clocks
Input clock
Output clock MMCX_SYNCLKO
MMCX_XI
For AVB/1588
Place close to KSZ9 3RNX
Close for MMCXOpen for test point
Open always
0.1uF DNP
C17
15pFC14
XO
15pFC13
XTAL-MEMS_XI
VDDIO
0.1uFC12
Place closeto pin 46
RST_N input stability option
GPIO_2
GPIO_1
Strapping Pins
Refer to KSZ9 3RNX Data heet for detailed descrip
Strapping pins have internal pull-ups/pull-downs (defau
external pull-ups/pull-downs are used to override intern
1
1000Mbps0
Port_3 SpeedLED2_1
10/100Mbps (default)
0, 1
0, 0
1, 1
1, 0
RMII
MII (default)
Port_3 xMII ModeRXD3, RXD2
RGMII
<reserved>
MII: PHY Mode
1
RMII: Clock Mode - RMII 50MHz Reference Clock output on RX_CLK pin
0
Port_3 MII / RMII ConfigurationLED2_0
(default)
MII: MAC ModeRMII: Normal Mode - RMII 50MHz Reference Clock input to TX_CLK pin
1
Start Switch disabledSwitch will not forward packets until the Start bit is
0
Start Switch ConfigurationLED1_0
Start Switch enabled (default)Switch will forward packets immediately after rese
Auto-Negotiation enable with EEE enab
PHY Ports 1 and 2 ConfigurationRX_ER, PME_N
0, 0
0, 1
1, 1
1, 0
<reserved>
Auto-Negotiation disable (Force 100MbpAuto-MDIX disable (set to MDI-X mode)Auto-Negotiation disable (Force 100MbpAuto-MDIX disable (set to MDI mode)
RESET_N
0RR18
0RR19
0RDNP
R480RDNP
R47
25REFCLK_QTS25REFCLK_QTS3
from Samtec connector
22RR26
22RR32
22RR25RX_DV_U1
RX_CLK_U1
RX_ER_U1
22RR2122RR2222RR2322RR24
RXD3_U1RXD2_U1RXD1_U1RXD0_U1
ClassName: RGMII-RX_U1
100kR12
VDDIO
MD3
1uF
C80RDNP
R130RR11
RESET_N_QTS3
RESET_N
from Samtec connectorRESET_N_QTS
0RR14
0RDNP
R15
LED1_1_PD
LED1_1_PULED1_1
*2-3IBA Mode
GPIO_2
GPIO_1XI
SYNCLKOSYNCLKO
GND
Test Options
Rosc
Rxtal
Rxo
P/N = ABM8G-25.000MHZ-4Y-T3
4-pin SMD, L x W (3.20mm x 2.50mm)
For Y1 = XTAL (default):
Populate Rxtal and RxoDNP Rosc
For Y1 = OSC:
Populate RoscDNP Rxtal and Rxo
4.7kDNP
R53
VDDIO
12
3
J1
1 2JP1
1 2JP2
2
111
MMCX FemaleDNP
J4
2
111
MMCX FemaleDNP
J3
Place across pins 2 and 3of IBA Mode Header
Shunt 2.54mm 1x2
SH1
4 2
13
25Mhz
Y1
TXRX1P_B1
TXRX1M_B2
TXRX1P_C3
TXRX1M_C4
TXRX1P_D6
AVDDL5
TXRX1M_D7
AVDDH8
TXRX2P_A9
TXRX2M_A10
AVDDL11
TXRX2P_B12
TXRX2M_B13
TXRX2P_C14
TXRX2M_C15
AVDDL16
TX
RX
2P
_D
17
TX
RX
2M
_D
18
AV
DD
H1
9
DV
DD
L2
0
RX
D3
21
RX
D2
22
RX
D1
23
RX
D0
24
RX
C /
RE
FC
LK
O /
RX
_C
LK
25
VD
DIO
26
RX
_D
V /
CR
S_
DV
/ R
X_
CT
L2
7
RX
_E
R2
8
TX
D3
29
TX
D2
30
TX
D1
31
TX
D0
32
TXC / REFCLKI / TX_CLK33
DVDDL34
TX_EN / TX_CTL35
TX_ER36
DVDDL37
VDDIO38
NC39
NC40
DVDDL41
LED2_042
LED2_143
PME_N44
INTRP_N45
RST_N46
SDO47
SDI / SDA / MDIO48
SC
S_
N4
9S
CL
/ M
DC
50
ePA
D6
5
AV
DD
H6
1T
XR
X1P
_A
62
TX
RX
1M
_A
63
AV
DD
L6
4
DV
DD
L5
1L
ED
1_
05
2L
ED
1_
15
3V
DD
IO5
4D
VD
DL
55
AV
DD
L5
6X
O5
7X
I5
8G
ND
59
ISE
T6
0 KSZ9893RNXIU1
Sch
ematics
2018
Microchip T
echnology Inc.D
S5
0002797A-p
age 23
FIG ONNECTOR
RX
X
MII / RMII / RGMII Port
PHY Mode
(mount on Bottom Side of Board)TOP VIEW - component placement side pin-outsts
VARIO_QTS
5V_QTS
2V5_QTS
3V3_QTS
ClassName: PowerPort 3 (PHY Mode)
RESET_N_QTSINTRP_N
INTRP_N 2RESET_N_QTS 2
PME_NPME_N 2
SDI_SDA_MDIOSCL_MDCSDOSCS_N
SCS_N 2SDO 2SCL_MDC 2SDI_SDA_MDIO 2
25REFCLK_QTS25REFCLK_QTS 2
5V_QTS
3V3_QTS
2V5_QTS
VARIO_QTS
135791113151719
2468
101214161820
212325272931333537394143454749
51535557596163656769717375777981838587899193959799
222426283032343638404244464850
525456586062646668707274767880828486889092949698
100
GND101-108
QTS-050-XX-L-D-A-GP
J7
URE B-2: EVB-KSZ9893 SCHEMATICS – PORTS 1 AND 2 PHYS; PORT 3 MAC – MII/RMII/RGMII C
ClassName: Power
TXRX1A_PTXRX1A_N
TXRX1B_PTXRX1B_N
TXRX1C_PTXRX1C_N
TXRX1D_PTXRX1D_N
TXRX1C_P 2TXRX1C_N 2
TXRX1D_P 2TXRX1D_N 2
RJ45_Chassis
220 OHM
FB5
RJ45_Chassis
PHY Port 1
Solid Color : 1G Link[0, 1]Blinking : Activity (RX, TX)
Solid Color : 100M LinkBlinking : Activity (RX, TX)
[1, 0]
Solid Color : 10M LinkBlinking : Activity (RX, TX)
[0, 0]
[1, 1] Link off
Tri-color Dual-LED Mode
Pins[LEDx_1, LEDx_0] Description
Green
Red
Orange
[toggling, 1]
[1, toggling]
[toggling, toggling]
<off>
Dual-LEDColor
(power-up default setting)
LED1_1 2
LED1_0 2
VDDIO
VDDIO
LED2_1 2LED2_1
LED2_0 2LED2_0
TXRX1A_N 2TXRX1A_P 2
TXRX1B_N 2TXRX1B_P 2
0.1uFC30
0.1uFC23
0.1uFC22
0.1uFC31
42
1 3
GREEN
RED
GREEN, RED
D2
42
1 3
GREEN
RED
GREEN, RED
D6
TXRX2A_PTXRX2A_N
TXRX2B_PTXRX2B_N
TXRX2C_PTXRX2C_N
TXRX2D_PTXRX2D_N
0.1uFC45
0.1uFC44
0.1uFC43
0.1uFC46
TXRX2A_P 2TXRX2A_N 2
TXRX2B_P 2TXRX2B_N 2
TXRX2C_P 2
TXRX2D_N 2
TXRX2C_N 2
TXRX2D_P 2
LED1_1
LED1_0
MH6
MTHOLE 4-40 120DL 220PAD
MH1
Mounting Holes (for RJ45_Chassis)
RJ45_Chassis RJ45_Chassis
TXD1
ClassName: QTS-PHY-
ClassName: QTS-PHY-T
RX_ER
For the xMII pins, Micrel parts naming convention isreferenced to the PHY side regardless of whether theswitch is in MAC mode or PHY mode. That is, "TX"named pins are inputs and "RX" named pins are outpufor MAC mode and PHY mode.
MH2
Mounting Holes (for QTS connector)
MH3 MH4
RXD0
RXD2
RXD1
RXD02
RXD12
RXD22
"Port 1"
"Port 2"
ClassName: Power
RJ45_Chassis
PHY Port 2
RXD3RXD32
RX_DVRX_DV2
RX_CLKRX_CLK2
RX_ER2
TX_ERTX_ER2
TX_EN
TX_CLKTX_CLK2
TX_EN2
TXD3TXD32
TXD2TXD22
TXD0TXD02
TXD12
330R
R9
330R
R4
330R
R45
330R
R46
TRD1-10
TRCT112
TRD1+11
TRD4-9
TRCT47
TRD4+8
TRD2-5
TRCT26
TRD2+4
TRD3-2
TRCT31
TRD3+3
SHIELD10
75 Ohms1nF,2kV
1 TRP1+
2 TRP1-3 TRP2+
6 TRP2-4 TRP3+
5 TRP3-7 TRP4+
8 TRP4-
4X
JACK RJ45 MAGJACK
J6
TRD1-10
TRCT112
TRD1+11
TRD4-9
TRCT47
TRD4+8
TRD2-5
TRCT26
TRD2+4
TRD3-2
TRCT31
TRD3+3
SHIELD10
75 Ohms1nF,2kV
1 TRP1+
2 TRP1-3 TRP2+
6 TRP2-4 TRP3+
5 TRP3-7 TRP4+
8 TRP4-
4X
JACK RJ45 MAGJACK
J2
* RGMII-RX_U1 + QTS-PHY-RX* QTS-PHY-TX
EV
B-K
SZ
9893 Evalu
ation
Bo
ard U
ser’s Gu
ide
DS
50002797A
-page 24
2018 M
icrochip Technolo
gy Inc.
0.1uF
C42
0.1uF
C16
0.1uF
C37
0.1uF
C32
0.1uF
C28
AVDDLU1 - KSZ9 3RNXDecouple Pins 5, 11, 16, 56, 64
0.1uF
C40
0.1uF
C19
0.1uF
C18
0.1uF
C33
0.1uF
C26
U1 - KSZ9 3RNXDecouple Pins 20, 34, 37, 41, 51, 55
DVDDL
0.1uF
C27
0.1uF
C41
0.1uF
C34
0.1uF
C29
AVDDH U1 - KSZ9 3RNXDecouple Pins 8, 19, 61
0.1uF
C39
0.1uF
C36
0.1uF
C15
VDDIO U1 - KSZ9 3RNXDecouple Pins 26, 38, 54
22uF
C35
22uF
C24
22uF
C25
22uF
C38
FIGURE B-3: EVB-KSZ9893 SCHEMATICS – BOARD POWER I/O AND REGULATORS
FID5 FID1 FID3
FID6 FID2 FID4
Fiducials
MPZ1608Y101B
FB3
AVDDL
0.1uF
C9
MPZ1608Y101B
FB2
DVDDL
0.1uF
C11
1V2
1V2 @ 1.2A
4.7uFC4
274kR6
294KR5
1V2
10kR8
On-board current < 0.25A
On-board current < 0.40A
TP1
"5V Ext."
2.2k
R1
5V_QTS
0.1uF
C6
AVDDH
0.1uF
C21
VDDIO
AVDDH
VDDIOOn-board current < 0.10A
On-board current < 0.20AMPZ1608Y101B
DNPFB1
MPZ1608Y101B
FB4
2V5_QTS
3V3_QTS
3V3_QTS
2V5_QTS
VARIO_QTSMPZ1608Y101B
FB6
VARIO_QTS
AVDDL
DVDDL
GND Test Pads
TP19 TP17 TP13 TP15
22uF
C7
22uF
C10
22uF
C5
22uF
C20
DNPTP8
DNPTP12
DNPTP10
DNPTP6
DNPTP9
DNPTP3
DNPTP5
DNPTP11
GREEN
D1
TP LOOP Black
TP18
TP LOOP Black
TP7
TP LOOP Black
TP4
TP LOOP Black
TP20
GND Test Points
SS1
OUT5
OUT6
OUT7
SW8
SW9
SW10
SNS12
FB14
PGND4
AGND2
VIN3
SS
OUTOUTOUT
SWSWSW
SNS
FBPGNDAGND
VIN
EN11
PG13
ePAD15
MIC33153U0
VOUT = 0.62 * [1 + (R-TOP / R-BOT)]
470pF
C1
0.1uF
C3
5V_QTS
4.7uF
C2
R-BOT = (0.62 * R-TOP) / (VOUT - 0.62)
5V_QTS
DNPTP2
LABEL1
EVB-KSZ9893EVALUATION BOARD
USER’S GUIDE
Appendix C. Bill of Materials (BOM)
C.1 INTRODUCTION
This appendix includes the EVB-KSZ9893 evaluation board Bill of Materials (BOM). Refer to Table C-1.
2018 Microchip Technology Inc. DS50002797A-page 25
EV
B-K
SZ
9893 Evalu
ation
Bo
ard U
ser’s Gu
ide
DS
50002797A
-page 26
2018 M
icrochip Technolo
gy Inc.
Manufacturer Manufacturer Part Number
06033A471JAT2A
C0603C475K8PACTU
rporation C1005X7R1H104K050BB
rporation C1608X5R1A226M080AC
0603YD105KAT2A
GRM1555C1H150JA01D
rporation C1005X7R1H104K050BB
den LMK316BJ226ML-T
Inc LTST-C191KGKT
LTST-C155KGJRKT
iconductor MMBD914LT1G
rporation MPZ1608Y101B
rporation MPZ1608Y101B
lectronics North America BLM18AG221SN1D
68000-103HLF
Inc. 0816-1X1T-23-F
onnectivity Solutions John- 135-3701-211
QTS-050-01-L-D-A-GP
lectronics Inc. 61300211121
ic ERJ-3EKF2201V
RC0603JR-074K7L
CRCW0603750RFKEA
ic ERJ-3GEYJ331V
ic Electronic Components ERJ-3EKF2943V
ic Electronic Components ERJ-3EKF2743V
RC0603JR-074K7L
ic ERJ-3GEYJ103V
CRCW0603750RFKEA
ponents NRC06Z0TRF
ic ERJ-3EKF1003V
ponents NRC06Z0TRF
TABLE C-1: BILL OF MATERIALS
Item Qty Reference Description Populated
1 1 C1 CAP CER 470pF 25V 5% NP0 SMD 0603 Yes AVX
2 2 C2, C4 CAP CER 4.7uF 10V 10% X5R SMD 0603 Yes KEMET
3 31 C3, C6, C9, C11, C12, C15, C16, C18, C19, C21, C22, C23, C26, C27, C28, C29, C30, C31, C32, C33, C34, C36, C37, C39, C40, C41, C42, C43, C44, C45, C46
CAP CER 0.1uF 50V 10% X7R SMD 0402 YES TDK Co
4 6 C5, C7, C10, C20, C24, C35 CAP CER 22uF 10V 20% X5R SMD 0603 YES TDK Co
5 1 C8 CAP CER 1uF 16V 10% X5R SMD 0603 Yes AVX
6 2 C13, C14 CAP CER 15pF 50V 5% NP0 SMD 0402 Yes Murata
7 1 C17 CAP CER 0.1uF 50V 10% X7R SMD 0402 DNP TDK Co
8 2 C25, C38 CAP CER 22uF 10V 20% X5R SMD 1206 Yes Taiyo Yu
9 3 D1, D4, D5 DIO LED GREEN 2V 30mA 35mcd Clear SMD 0603 YES Lite-On
10 2 D2, D6 DIO LED BI GREEN, RED 2V 30mA 1210 YES Lite-On
11 1 D3 DIO RECT MMBD914LT1G 1V 10mA 100V SMD SOT-23-3 YES ON Sem
12 1 FB1 FERRITE CHIP 100 OHM 2A 0603 DNP TDK Co
13 4 FB2, FB3, FB4, FB6 FERRITE CHIP 100 OHM 2A 0603 YES TDK Co
14 1 FB5 FERRITE 500mA 220R SMD 0603 YES Murata E
15 2 J1, J5 CON HDR-2.54 Male 1x3 Gold 5.84MH TH VERT Yes FCI
16 2 J2, J6 CON JACK RJ45 MAGJACK TH RA YES Bel Fuse
17 2 J3, J4 CON RF Coaxial MMCX Female 2P TH VERT DNP Cinch Cson
18 1 J7 CON STRIP High Speed Stacker 5mm Male 2x50 SMD VERT YES Samtec
19 2 JP1, JP2 CON HDR-2.54 Male 1x2 Gold 5.84MH TH VERT YES Wurth E
20 1 LABEL1 LABEL, NEED HELP WITH ASSY/SERIAL MECH
21 1 R1 RES TKF 2.2k 1% 1/10W SMD 0603 Yes Panason
22 6 R2, R27, R34, R35, R52, R53 RES TKF 4.7k 5% 1/10W SMD 0603 DNP Yageo
23 6 R3, R30, R31, R38, R40, R41 RES TKF 750R 1% 1/10W SMD 0603 DNP Vishay
24 4 R4, R9, R45, R46 RES TKF 330R 5% 1/10W SMD 0603 Yes Panason
25 1 R5 RES TKF 294K 1% 1/10W SMD 0603 YES Panason
26 1 R6 RES TKF 274K 1% 1/10W SMD 0603 YES Panason
27 8 R7, R17, R29, R36, R39, R42, R50, R51 RES TKF 4.7k 5% 1/10W SMD 0603 Yes Yageo
28 1 R8 RES TKF 10k 5% 1/10W SMD 0603 Yes Panason
29 6 R10, R16, R28, R33, R37, R44 RES TKF 750R 1% 1/10W SMD 0603 Yes Vishay
30 4 R11, R14, R18, R19 RES TKF 0R 1/10W SMD 0603 YES NIC Com
31 1 R12 RES TKF 100k 1% 1/10W SMD 0603 Yes Panason
32 4 R13, R15, R47, R48 RES TKF 0R 1/10W SMD 0603 DNP NIC Com
Bill o
f Materials (B
OM
)
2018
Microchip T
echnology Inc.D
S5
0002797A-p
age 27
3 ERJ-3GEYJ471V
3 RC0603FR-0722RL
3 9T06031A6041FBHFT
3 969102-0000-DA
3 nts PTS810 SJM 250 SMTR LFS
3 5001
3 TSW-101-07-S-S
4 ABM8G-25.000MHZ-4Y-T3
4 nology MIC33153YHJ-TR
4 nology Inc. KSZ9893RNXI
TA
Ite nufacturer Manufacturer Part Number
3 2 R20, R43 RES TKF 470R 5% 1/10W SMD 0603 Yes Panasonic
4 7 R21, R22, R23, R24, R25, R26, R32 RES TKF 22R 1% 1/10W SMD 0603 YES Yageo
5 1 R49 RES TKF 6.04k 1% 1/10W SMD 0603 Yes Yageo
6 2 SH1, SH2 MECH HW JUMPER 2.54mm 1x2 MECH 3M
7 1 SW1 SWITCH TACT SPST 16V 50mA PTS810 SJM 250 SMTR LFS SMD
YES C&K Compone
8 4 TP4, TP7, TP18, TP20 MISC, TEST POINT MULTI PURPOSE MINI BLACK YES Keystone
9 2 TP14, TP16 CON HDR-2.54 Male 1x1 Gold 5.84MH TH VERT YES Samtec Inc.
0 1 Y1 CRYSTAL 25MHz 10pF SMD ABM8G YES Abracon LLC
1 1 U0 MCHP ANALOG SWITCHER Buck 0.6V to 3.6V MIC33153YHJ-TR VFDFN-14
YES Microchip Tech
2 1 U1 MCHP INTERFACE ETHERNET KSZ9893RNXI QFN-64 YES Microchip Tech
BLE C-1: BILL OF MATERIALS (CONTINUED)
m Qty Reference Description Populated Ma
EVB-KSZ9893 Evaluation Board User’s Guide
DS50002797A-page 28 2018 Microchip Technology Inc.
NOTES:
EVB-KSZ9893EVALUATION BOARD
USER’S GUIDE
Appendix D. Silk Screen
D.1 INTRODUCTION
This appendix shows the EVB-KSZ9893 evaluation board top and bottom silk screen images. See Figure D-1 and Figure D-2.
FIGURE D-1: EVB-KSZ9893 TOP SILK SCREEN
2018 Microchip Technology Inc. DS50002797A-page 29
EVB-KSZ9893 Evaluation Board User’s Guide
FIGURE D-2: EVB-KSZ9893 BOTTOM SILK SCREEN
DS50002797A-page 30 2018 Microchip Technology Inc.
2018 Microchip Technology Inc. DS50002797A-page 31
NOTES:
DS50002797A-page 32 2018 Microchip Technology Inc.
AMERICASCorporate Office2355 West Chandler Blvd.Chandler, AZ 85224-6199Tel: 480-792-7200 Fax: 480-792-7277Technical Support: http://www.microchip.com/supportWeb Address: www.microchip.com
AtlantaDuluth, GA Tel: 678-957-9614 Fax: 678-957-1455
Austin, TXTel: 512-257-3370
BostonWestborough, MA Tel: 774-760-0087 Fax: 774-760-0088
ChicagoItasca, IL Tel: 630-285-0071 Fax: 630-285-0075
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DetroitNovi, MI Tel: 248-848-4000
Houston, TX Tel: 281-894-5983
IndianapolisNoblesville, IN Tel: 317-773-8323Fax: 317-773-5453Tel: 317-536-2380
Los AngelesMission Viejo, CA Tel: 949-462-9523Fax: 949-462-9608Tel: 951-273-7800
Raleigh, NC Tel: 919-844-7510
New York, NY Tel: 631-435-6000
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Canada - TorontoTel: 905-695-1980 Fax: 905-695-2078
ASIA/PACIFICAustralia - SydneyTel: 61-2-9868-6733
China - BeijingTel: 86-10-8569-7000
China - ChengduTel: 86-28-8665-5511
China - ChongqingTel: 86-23-8980-9588
China - DongguanTel: 86-769-8702-9880
China - GuangzhouTel: 86-20-8755-8029
China - HangzhouTel: 86-571-8792-8115
China - Hong Kong SARTel: 852-2943-5100
China - NanjingTel: 86-25-8473-2460
China - QingdaoTel: 86-532-8502-7355
China - ShanghaiTel: 86-21-3326-8000
China - ShenyangTel: 86-24-2334-2829
China - ShenzhenTel: 86-755-8864-2200
China - SuzhouTel: 86-186-6233-1526
China - WuhanTel: 86-27-5980-5300
China - XianTel: 86-29-8833-7252
China - XiamenTel: 86-592-2388138
China - ZhuhaiTel: 86-756-3210040
ASIA/PACIFICIndia - BangaloreTel: 91-80-3090-4444
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India - PuneTel: 91-20-4121-0141
Japan - OsakaTel: 81-6-6152-7160
Japan - TokyoTel: 81-3-6880- 3770
Korea - DaeguTel: 82-53-744-4301
Korea - SeoulTel: 82-2-554-7200
Malaysia - Kuala LumpurTel: 60-3-7651-7906
Malaysia - PenangTel: 60-4-227-8870
Philippines - ManilaTel: 63-2-634-9065
SingaporeTel: 65-6334-8870
Taiwan - Hsin ChuTel: 886-3-577-8366
Taiwan - KaohsiungTel: 886-7-213-7830
Taiwan - TaipeiTel: 886-2-2508-8600
Thailand - BangkokTel: 66-2-694-1351
Vietnam - Ho Chi MinhTel: 84-28-5448-2100
EUROPEAustria - WelsTel: 43-7242-2244-39Fax: 43-7242-2244-393
Denmark - CopenhagenTel: 45-4450-2828 Fax: 45-4485-2829
Finland - EspooTel: 358-9-4520-820
France - ParisTel: 33-1-69-53-63-20 Fax: 33-1-69-30-90-79
Germany - GarchingTel: 49-8931-9700
Germany - HaanTel: 49-2129-3766400
Germany - HeilbronnTel: 49-7131-67-3636
Germany - KarlsruheTel: 49-721-625370
Germany - MunichTel: 49-89-627-144-0 Fax: 49-89-627-144-44
Germany - RosenheimTel: 49-8031-354-560
Israel - Ra’anana Tel: 972-9-744-7705
Italy - Milan Tel: 39-0331-742611 Fax: 39-0331-466781
Italy - PadovaTel: 39-049-7625286
Netherlands - DrunenTel: 31-416-690399 Fax: 31-416-690340
Norway - TrondheimTel: 47-7288-4388
Poland - WarsawTel: 48-22-3325737
Romania - BucharestTel: 40-21-407-87-50
Spain - MadridTel: 34-91-708-08-90Fax: 34-91-708-08-91
Sweden - GothenbergTel: 46-31-704-60-40
Sweden - StockholmTel: 46-8-5090-4654
UK - WokinghamTel: 44-118-921-5800Fax: 44-118-921-5820
Worldwide Sales and Service
08/15/18