Post on 07-Oct-2014
Chapter 4 : Instruction Set for 8086
1EE353: Introduction to MicroprocessorDr. Ridha Jemal
4.1. Data Transfer Instructions
4.2. Arithmetic Instructions
4.3. Logic Instructions
4.4. Comparison Instruction
4.5. Jump Instructions
By Dr. Ridha JemalElectrical Engineering Department
College of Engineering
King Saud University
Data Transfer Instruction
2Dr. Ridha Jemal EE353: Introduction to Microprocessor 1431-1432
• Mov Instruction: This instruction is well studied
• Push and Pop Instructions:
The data is transferred according tot the LIFO (Last In First out)
The Push instruction transfers two bytes to the top of the stack.
Ex: PUSH CX ; [ss:SP-1] CH
; [ss:SP-1] CL
; SP SP-2
PUSH reg16 PUSH BX 16-bit registerPUSH seg PUSH DS Segment register PUSH mem PUSH [DI+2] memory PUSHA PUSHA Save all 16-bit registers PUSHF PUSHF Save flags
PUSHA instruction pushes all the internal registers onto the stack in thefollowing order: AX, CX, DX, BX, SP, BP, SI, DI. The value of the SP is thatbefore the PUSHA instruction.The PUSHF (push flag) instruction copies the contents of the flag register tothe stack.
Data Transfer Instruction
3Dr. Ridha Jemal EE353: Introduction to Microprocessor 1431-1432
• Push Instruction:
Data Transfer Instruction
4Dr. Ridha Jemal EE353: Introduction to Microprocessor 1431-1432
The operation of PUSHA instruction showing the locationsand stack data (push flag) instruction copies the contents ofthe flag register to the stack.
Data Transfer Instruction
5Dr. Ridha Jemal EE353: Introduction to Microprocessor 1431-1432
• PoP Instruction:
It performs the reversion operation of the PUSHinstruction.
• Ex1: POP BX
BL [ss:SP]
BH [ss:SP+1]
SP SP+2
• Ex2:MOV AX, 7C3DH
PUSH AX
POP BX
Int 3
Data Transfer Instruction
6Dr. Ridha Jemal EE353: Introduction to Microprocessor 1431-1432
Data Transfer Instruction
7Dr. Ridha Jemal EE353: Introduction to Microprocessor 1431-1432
• XCHG Instruction:
It performs a register-to-register or register-to-memory swap.
operation of the PUSH instruction.
• Ex: XCHG AX,BX ; AX BX
XCHG AL,AH ; AL AH
XCHG [SI],DX ;[DS:SI] DX
• LAHF and SAHF Instruction:
LAHF ; AH Flags Low
LAHF ; Flags Low AH
Data Transfer Instruction
8Dr. Ridha Jemal EE353: Introduction to Microprocessor 1431-1432
Data Transfer Instruction
9Dr. Ridha Jemal EE353: Introduction to Microprocessor 1431-1432
• Ex: XMOVCHG AX,BX; AX BX
XCHG AL,AH ; AL AH
XCHG [SI],DX ;[DS:SI] DX
• LAHF and SAHF Instruction:
LAHF ; AH Flags Low
LAHF ; Flags Low AH
Data Transfer Instruction
10Dr. Ridha Jemal EE353: Introduction to Microprocessor 1431-1432
• LDS and LES Instruction:
LDS: Load memory double word into word register and DS.
LES: Load memory double word into word register and ES.
LDS and LES load a 16-bit register with offset address retrieved from amemory location then load either DS or ES with a segment addressretrieved from memory.
LDS BX,word ptr [SI]
BL [SI], BH [SI+1]
DS [SI+3:SI+2] in the data segment
LES BX,word ptr [SI]
BL [SI], BH [SI+1]
ES [SI+3:SI+2] in the extra segment
Data Transfer Instruction
11Dr. Ridha Jemal EE353: Introduction to Microprocessor 1431-1432
Data Transfer Instruction
12Dr. Ridha Jemal EE353: Introduction to Microprocessor 1431-1432
• This instruction transfers the 32-bit number, addressed by DI in the data segment, into the BX and DS registers.
• LDS and LES instructions obtain a new far address from memory.
• – offset address appears first, followed by the segment address
• This format is used for storing all 32-bit memory addresses.
• A far address can be stored in memory by the assembler.
Data Transfer Instruction
13Dr. Ridha Jemal EE353: Introduction to Microprocessor 1431-1432
Data Transfer Instruction
14Dr. Ridha Jemal EE353: Introduction to Microprocessor 1431-1432
• STRING DATA TRANSFERS
o Instructions for moving large blocks of data or strings.
o Five string data transfer instructions: LODS, STOS, MOVS, INS, and OUTS.
o Each allows data transfers as a single byte, word, or double word.
o Before the string instructions are presented, the operation of the D flag-bit (direction), DI, and SI must be understood as they apply to the stringinstructions.
• The Direction Flag
o The direction flag (D, located in the flag register) selects the auto-increment or the auto-decrement operation for the DI and SI registersduring string operations. It is used only with the string instructions
o The CLD instruction clears the D flag and the STD instruction sets it . CLDinstruction selects the auto-increment mode and STD selects the auto-decrement mode .
Data Transfer Instruction
15Dr. Ridha Jemal EE353: Introduction to Microprocessor 1431-1432
DI and SI
• During execution of string instruction, memory accesses occur through DI and SI registers.
– DI offset address accesses data in the extra segment for all string instructions that use it
– SI offset address accesses data by default in the data segment
Setting the Direction Flag
Two instructions used:
STD: set direction flag so that the pointers are auto decremented.
CLD: clear direction flag so that the pointers are auto incremented.
16Dr. Ridha Jemal EE353: Introduction to Microprocessor 1431-1432
• STOS Instruction:
Stores AL or AX at the extra segment memory location addressed by the DIregister; if DF = 0, increment DI, else decrement DI.
STOSB ES:[DI] AL
IF DF=0, DI DI+1
IF DF=1, DI DI-1
STOSW ES:[DI] AL
ES:[DI+1] AH
IF DF=0, DI DI+2
IF DF=1, DI DI-2
Data Transfer Instruction
17Dr. Ridha Jemal EE353: Introduction to Microprocessor 1431-1432
• EXAMPLE For STOSB Instruction
ORG 100
LEA DI, Table1 ; Point to the offset of Table1
MOV AL,12h ; Put 12H in the AL
MOV CX,5 ; number of values to be stored in Table 1
REP STOSB
RET
Table 1 db 6 dup (?)
After the execution, Table1 contains 5 values of 12H
12h 12h 12h 12h 12h 00
Data Transfer Instruction
• Repeat Prefix
Preceding the string instructions STOS or MOVS with REP causes these instructions to be repeated a number of times equal to the contents of CXregister.
REP STOSB ; STOSB ; CX CX-1 (repeat until CX = 0)
18Dr. Ridha Jemal EE353: Introduction to Microprocessor 1431-1432
• LODS Instruction:
Loads AL or AX with the data stored at the data segment memory locationaddressed by the SI register; if DF = 0, increment SI, else decrement SI
LODSB AL DS:[SI]
IF DF=0, SI SI+1
IF DF=1, SI SI-1
LODSW AL DS:[SI]
AH DS:[SI+1]
IF DF=0, SI SI+2
IF DF=1, SI SI-2
Data Transfer Instruction
19Dr. Ridha Jemal EE353: Introduction to Microprocessor 1431-1432
• EXAMPLE For LODSB Instruction
ORG 100
LEA SI, Table2 ; Point to the offset of Table2
MOV CX,5 ; number of values to be loaded from Table
2
REP LODSB
RET
Table2 db ‘1’,’2’,’3’,’4’,’5’,’6’,’7’
After the execution, Table1 contains AL contains 35h
which is the ASCII code of 5
Data Transfer Instruction
20Dr. Ridha Jemal EE353: Introduction to Microprocessor 1431-1432
Data Transfer Instruction
• MOVS Instruction:
Transfers data from a memory location to another.
This is the only memory-to- memory transfer allowed.
The MOVS instruction transfer a byte or a word from the data segment locationaddressed by the SI to the extra segment location addressed by the DI. Thepointers then increment or decrement according to DF.
MOVSB ES:[DI] DS:[SI]
IF DF=0, SI SI+1
DI DI+1
IF DF=1, SI SI-1
DI DI-1
MOVSW ES:[DI] DS:[SI]
ES:[DI+1] DS:[SI+1]
IF DF=0, SI SI+2
DI DI+2
IF DF=1, SI SI-2
DI DI+2
21Dr. Ridha Jemal EE353: Introduction to Microprocessor 1431-1432
Data Transfer Instruction
• XLAT Translate Instruction
Operation: AL AL+BX+DS*16
Affected Flags : None
o Converts the contents of the AL register into a number stored in a memorytable.
o Performs the direct table lookup technique often used to convert one codeto another .
• An XLAT instruction first adds the contents of AL to BX to form a memoryaddress within the data segment.
o Copies the contents of this address into AL.
o Only instruction adding an 8-bit to a 16-bit number.
22Dr. Ridha Jemal EE353: Introduction to Microprocessor 1431-1432
Data Transfer Instruction
• Example for XLAT Instruction
Assume DS=0300H, BX=0100h and AL=0DH
ODH represents the ASCII code of the character CR.
The execution of XLAT replaces the contents of AL by the content of the memorylocation with the physical address:
PA = DS*16+BX +AL
= 03000+0100+0DH=0310DH
Thus
AL [0310DH].
Assuming this memory locations contains 52H (EBCDIC code for CR) this value isplaced in AL.
Thus = 52H
Performs the direct table lookup technique often used to convert one code toanother .
.
23Dr. Ridha Jemal EE353: Introduction to Microprocessor 1431-1432
Data Transfer Instruction
The operation of the XLAT instruction at the point just before 6DH is loaded into AL
24Dr. Ridha Jemal EE353: Introduction to Microprocessor 1431-1432
Data Transfer Instruction
• INS OUTS Instructions
• Assume that one needs a table for the values of x2, where x is between 0 and 9.
First the table is generated and stored in memory:
square DB 0,1,4,9,16,25,36,49,64,81
MOV BX,OFFSET square ; Load the offset address
MOV AL,05 ; AL=05 will retrieve 6th element
XLAT ; Pull out of table the element
; Put in AL
After execution of this program, the AL register will have 25 (19H)
25Dr. Ridha Jemal EE353: Introduction to Microprocessor 1431-1432
Data Transfer Instruction
• INS OUTS Instructions
An IN instruction transfers data from an external I/O device to AL or AX. An OUT instruction transfers data from AL or AX to an external I/O device.
The I/O device address is called port address.
In direct addressing mode the address is a single byte.
In indirect addressing mode the address is two bytes in DX
• Ex: IN AL,2EH ; AL port 2EH
IN AX,26H ; AL port 26H
; AH port 27H
IN AL,DX ; AL port DX
IN AX,DX ; AL port DX
; AH port DX+1
26Dr. Ridha Jemal EE353: Introduction to Microprocessor 1431-1432
Data Transfer Instruction
• INS OUTS Instructions
An IN instruction transfers data from an external I/O device to AL or AX. An OUT instruction transfers data from AL or AX to an external I/O device.
The I/O device address is called port address.
In direct addressing mode the address is a single byte.
In indirect addressing mode the address is two bytes in DX
• Ex: OUT 2EH,AL ; Port 2EH AL
OUT 2EH,AX ; Port 2EH AL
; Port 2EH AH
OUT DX,AL ; Port DX AL
OUT DX,AX ; Port DX AL
; Port DX+1 AH
Arithmetic Instructions : Basic Instructions (+, -, *, /)
27Dr. Ridha Jemal EE353: Introduction to Microprocessor 1431-1432
• ADD Instruction: ADD Dest, Source
Dest Source + Dest; Flag bits are affected
Ex: MOV AX,32FAh
MOV BX,1F02h
ADD AL,BL
ADD AL,5
• INC (Increment by 1) Instruction: INC Dest
Ex: MOV AX,67f2h
INC AL
INC AH
Increment instruction (INC) adds 1 to a register or a memory location. The INC canadd 1 to any register or memory location, except a segment register. With indirectmemory increments, the size of the data must be described by using the BYTE PTR orWORD PTR directives. The reason is that the assembler program cannot determine if,for example, the INC [DI] instruction is a byte-, or word -sized increment.
Arithmetic Instructions : Basic Instructions (+, -, *, /)
28Dr. Ridha Jemal EE353: Introduction to Microprocessor 1431-1432
• ADC (ADD with carry) Instruction: ADC Dest, Source
Ex: MOV AX,32C5h
MOV CX,1CA2h
ADD AL,2
ADC AH,AL
ADD AX,CX
Increment instructions affect the flag bits except the carry flag bit. Carry doesn'tchange because we often use increments in programs that depend upon the contentsof the carry flag.
Note that increment is used to point to the next memory element in a byte-sizedarray of data only.If word-sized data are addressed. it is better to use an ADD DI,2 instruction to modifythe DI pointer in place of two INC DI instructions.
An addition-with-carry instruction (ADC) adds the bit in the carry flag (C) to theoperand data. This instruction mainly appears in software that adds numbers that arewider than 16 bits in the 8086.
Arithmetic Instructions (contd.)
29Dr. Ridha Jemal EE353: Introduction to Microprocessor 1431-1432
• SUB Instruction: SUB Dest, Source
o Dest Source - Dest; Flag bits is affected
Ex: MOV AL,A7h
MOV BL,3Fh
SUB AL,BL
SUB AL,5
Many forms of subtraction (SUB) appear in the instruction set.
The only types of subtraction not allowed are memory-to-memory and segmentregister subtractions. Like other arithmetic instructions, the subtract instructionaffects the flag bits.
Arithmetic Instructions (contd.)
30Dr. Ridha Jemal EE353: Introduction to Microprocessor 1431-1432
• DEC (decrement by 1) Instruction: DEC Dest
Ex: SUB AX,AX
DEC AX
DEC BYTE PTR [1000h]
Or
DEC BYTE PTR [1000h]
DEC instruction subtracts a 1 from a register or the contents of a memorylocation. The decrement indirect memory data instructions require BYTE PTR, orWORD PTR.
Arithmetic Instructions
31Dr. Ridha Jemal EE353: Introduction to Microprocessor 1431-1432
• SBB Instruction (Subtract with borrow):o SBB Dest, Source
o Dest Source - Dest;
o Flag bits is affected
Ex: MOV AL,A7h
MOV BL,3Fh
SUB AL,BL
SUB AL,5
A subtraction-with-borrow (SBB) instruction functions as a regular sbtraction,except that the carry flag (C), which holds the borrow, also subtracts from thedifference. The most common use for this instruction is for subtractions that arewider than 16 bits in the 8086.Wide subtractions require that borrows propagate through the subtraction, just aswide additions propagate the carry. Like the SUB instruction, SBB affects the flags.Notice that the immediate subtract from memory instruction in this table requiresa BYTE PTR , or WORD PTR directive.
Arithmetic Instructions
32Dr. Ridha Jemal EE353: Introduction to Microprocessor 1431-1432
• MUL Instruction (Multiplication of unsigned number ):
o MUL Data AX AL*Data or DXAX AX*Data
o The source operand can be a memory location or a register.
o When we multiply an n-bit number with an m-bit number, the product will be
at most (n+m) bits.
Ex: MOV AL,05h
MOV BL,04h
MUL BL ; ALAL*BL = 14h
Arithmetic Instructions
33Dr. Ridha Jemal EE353: Introduction to Microprocessor 1431-1432
• IMUL Instruction (Multiplication of signed number ):o IMUL Data AX AL*Data or DXAX AX*Data
o When we multiply an n-bit number with an m-bit number, the product will be
at most (n+m) bits.
Ex: MOV AL,-1 ; MOV AL,FFh
MOV BL,3
IMUL BL ; AX = FFFDh
Arithmetic Instructions (contd.)
34Dr. Ridha Jemal EE353: Introduction to Microprocessor 1431-1432
Examples
An 8-bit unsigned integer, X, is present in the data segment at offset 2200h. Write an
assembly code to calculate R=X4+1. We assume That R can be stored in 32 bits
and should be stored in the data segment starting at offset 7000H.
MOV AL,[2200h] ; AL=X
MUL AL ; AX=X2
MUL AX ; DXAX=X4
ADD AX,1
ADC DX,0 ; DXAX= X3+1
MOV [7000h],AX
MOV [7002h],DX
Arithmetic Instructions (contd.)
35Dr. Ridha Jemal EE353: Introduction to Microprocessor 1431-1432
Examples
Suppose an 8-bit register unsigned number, X, is present in the data segment
of memory at offset 1200h. Write a program to calculate: R=X3+1 . We
assume That R can needs 32 bits at most and should be stored in the data
segment starting at offset 2000H.
MOV AL,[1200h] ; AL=X
MOV BL,AL ; BL=X
MUL AL ; AX=X2
MOV BH,0 ; BL=X
MUL BX ; DXAX=X3
ADD AX,1
ADC DX,0 ; DXAX= X3+1
MOV [2000h],AX
MOV [2002h],DX
Arithmetic Instructions
36Dr. Ridha Jemal EE353: Introduction to Microprocessor 1431-1432
• DIV Instruction (Multiplication of unsigned number ):o DIV Data Quotient in AL ; Reminder in AH
Ex: MOV AL,19
MOV CL,3
DIV CL ; AL 6 (quotient); AH 1 (reminder)
• IDIV Instruction (Multiplication of signed number ):o DIV Data Quotient in AL ; Reminder in AH
Ex: MOV AX,16 ; AL = 10h
MOV BL,-3 ; BL = FDh (2’S comp. of 3)
IDIV BL
Example: Suppose an 8-bit number X is present in AL.
Write an assembly code to calculate
MOV AL,X
MOV BL,4
CBW BL ; Convert Byte to word BH is filled with zeros
IDIV BL
37Dr. Ridha Jemal EE353: Introduction to Microprocessor 1431-1432
Logic Instructions
• AND Instruction : Affected Flag: OF, SF, ZF, PF, CFAND Dest, Source; Dest (Dest Source)
Some flag bits change (S, Z and P. C = 0)
Uses any addressing mode except memory to memory and
segment registers addressing.
Ex: MOV AX,3FCAh
MOV CX,CC09h
AND AL,CL ;AL = 08
AND AL,F1h ;AL = 0
The AND operation is used for masking. We can set a particular bit in aregister to 0 without changing other bits.
x.0 = 0 x x x x x x x x
x.1 = x 1 1 1 1 1 1 0 0
x x x x x x 0 0
• Logical Operation : AND, OR, NOT, XOR
38Dr. Ridha Jemal EE353: Introduction to Microprocessor 1431-1432
• OR Instruction : OR Dest, Source; Affected Flag: OF, SF, ZF, PF, CF
Dest (Dest Source)
Some flag bits change (S, Z and P. C = 0)
Uses any addressing mode except memory to memory and
segment registers addressing.
Ex: MOV AL,13h
MOV BL,30h
OR AL,BL ;AL = 33h
OR instruction is used to set a particular bit in a register to 1 (Bit Setting).
x+1 = 1 x x x x 0 x x 0
x+0 = x 0 0 0 0 1 0 0 1
x x x x 1 x x 1
Ex: OR AL,BH
OR SI,DI
OR BX,[SI]
OR Data[SI+20h],AL
Logic Instructions
39Dr. Ridha Jemal EE353: Introduction to Microprocessor 1431-1432
• XOR Instruction : XOR Dest, Source; Affected Flag: OF, SF, ZF, PF, CF
Dest (Dest Source)
XOR is used to complement a particular bits (BitComplementing).
0 0 = 0
0 1 = 1
1 1 = 0
x 1 = x’
x 0 = x
Ex: XOR AL,AL
OR CX,600h
AND CX,FFFCh
XOR CX,1000h ;
Logic Instructions
40Dr. Ridha Jemal EE353: Introduction to Microprocessor 1431-1432
• NOT Instruction : NOT Dest; Affected Flag: None
NOT is a logical inversion
Ex: NOT CL ;CH is one’s complement
NOT TEMP
NOT BYTE PTR [1000h] ;1’s complement of the byte in 1000h
• NEG Instruction : NEG Dest;
NEG is an arithmetic inversion (2’s complement)
Ex: NEG DL ;DL is 2’s complement
NEG BX
Logic Instructions
41Dr. Ridha Jemal EE353: Introduction to Microprocessor 1431-1432
• SHL Shift Logical Left Instruction : SHL Target, Count;
o SHL Target, 1;
o SHL Target, CL;
SHL multiplies the number signed or unsigned by 2 oneach shift
The target can be a register or a memory
Ex: MOV BL,10110101B
SHL BL,1
MOV CL,3
SHL BL,CL ;
Shift Instruction
PF, SF and ZF flags are affected by shift instructions but left unchanged by
the rotate instructions.
SHL 0
… …Carry
Target
Logic Instructions
42Dr. Ridha Jemal EE353: Introduction to Microprocessor 1431-1432
Ex: MOV AL,00000011B
SHL AL,1
SHL AL,-1
MOV AL,-1
SHL AL,1
SHL AL,1
Shift Instruction
Logic Instructions
43Dr. Ridha Jemal EE353: Introduction to Microprocessor 1431-1432
• SHR Shift Logical Right Instruction : SHR Target, Count;o SHR Target, 1;
o SHR Target, CL;
SHL divides the number signed or unsigned by 2 on eachshift
The target can be a register or a memory
Ex: MOV AL,8
SHR AL,1
MOV BL,16
MOV CL,3
SHR BL,CL ;
Shift Instruction
SHR 0
… …Carry
Target
Logic Instructions
44Dr. Ridha Jemal EE353: Introduction to Microprocessor 1431-1432
• SAL Shift Arithmetic left Instruction :o SAL Target, 1;
o SAL Target, CL;
SAL divides a signed number by 2 on each shift
The target can be a register or a memory
Ex: MOV AL,8
SAL AL,1
MOV BL,16
MOV CL,3
SAL BL,CL ;
Shift Instruction
SAL 0
… …Carry
Target
Logic Instructions
45Dr. Ridha Jemal EE353: Introduction to Microprocessor 1431-1432
• SAR Shift Arithmetic Right Instruction :o SAR Target, 1;
o SAR Target, CL;
SAL divides a signed number by 2 on each shift(The MSBremains the same)
The target can be a register or a memory
Ex: MOV AL,6
SAR AL,1
MOV BL,-16
MOV CL,3
SAR BL,CL ;
Shift Instruction
SAR
… …Carry
Target
Logic Instructions
46Dr. Ridha Jemal EE353: Introduction to Microprocessor 1431-1432
• Shifting Example
An 16-bit unsigned number X is present in AX register. Write a program to compute 10.X, assuming that final result can be filled in 16 bits.
Solution #1 using MUL (Delay consuming solution)
Ex: MOV BX,10 ; 2 clock cycles
MUL BX ; DXAX=10X -> 120 clock cycles
Solution #2 using SHIFT an ADD
Ex: MOV AX,1 ; AX=2X -> 2 clock cycles
MOV BX,AX ; BX=2X -> 2 clock cycles
SHL AX,1 ; AX=4X -> 2 clock cycles
SHL AX,1 ; AX=8X -> 2 clock cycles
ADD AX,BX ; AX=10X -> 4 clock cycles
-> 12 clock cycles
Example
Logic Instructions
47Dr. Ridha Jemal EE353: Introduction to Microprocessor 1431-1432
• ROL/ROR Rotate Left (Right) Instruction :o ROL/ROR Target, 1;
o ROL/ROR Target, CL;
All except immediate and segment registers.
Ex: MOV AL,BCh
ROL AL,1
ROL AL,1
ROR AL,1
ROR AL,1
Rotate Instruction
ROL
… …Carry
Target
ROR
… … Carry
Target
Logic Instructions
48Dr. Ridha Jemal EE353: Introduction to Microprocessor 1431-1432
• RCL/RCR Rotate Through Carry Left (Right) Instruction :o RCL/RCR Target, 1;
o RCL/RCR Target, CL;
All except immediate and segment registers.
Rotate Instruction
RCL
… …Carry
Target
RCR
… … Carry
Target
Ex: Consider a 64-bit number X=X63X62…X0 located in DXCXBXAX
registers. Write an assembly code to shift X one position left.
Sol1: SHL AX,1
SHL BX,1
SHL CX,1
SHL CX,1
Sol2: SHL AX,1
RCL BX,1
RCL CX,1
RCL CX,1
Logic Instructions
49Dr. Ridha Jemal EE353: Introduction to Microprocessor 1431-1432
• RCL Shift Arithmetic Right Instruction :o SAR Target, 1;
o SAR Target, CL;
All except immediate and segment registers.
Count must be 1 or CL.
Ex: MOV AL,6
SAR AL,1
MOV BL,-16
MOV CL,3
SAR BL,CL ;
Rotate Instruction
Logic Instructions
50Dr. Ridha Jemal EE353: Introduction to Microprocessor 1431-1432
Comparison Instruction
• CMP (Compare)Instruction :• CMP Source1 – Source2; Update flags
The comparison instruction (CMP) is a subtraction that changes only the flag bits;the destination operand never changes. A comparison is useful for checking theentire contents of a register or a memory location against another value.
• A CMP is normally followed by a conditional jump instruction, which tests thecondition of the flag bits. The only disallowed forms of compare are memory-to-memory and segment register compares.
Ex1: CMP CL,BL
CMP AX,SP
CMP AX,SP
CMP AX,2000h
CMP [DI],CH
CMP CL,[BP]
Ex2: CMP AL,10h ;compare AL with 10h
JAE label ;if 10h or obove
•
51Dr. Ridha Jemal EE353: Introduction to Microprocessor 1431-1432
Jump Instructions
Short Jump (relative jump): is a two-byte instruction where the targetaddress within -128 to +127 of the IP value
• JMP Instruction : JMP Disp.
o Unconditional jump (without testing any condition)
o Conditional jump where condition is tested through one of the following flagbits : Z, C, P, O, S
Ex: XOR BX,BX ; BX= 0
Start: MOV AX,1 ; AX= 1
ADD AX,BX ; BX= 0
JMP SHORT Next ; or JMP Next (Opcode=EB)
Next: MOV BX,AX
JMP Start
52Dr. Ridha Jemal EE353: Introduction to Microprocessor 1431-1432
Jump Instructions
Near Jump :
• Direct: this is a 3-bytes instruction. the first byte is the code and the nexttwo are the signed number displacement value.
• Register indirect jump
JMP DI ; IP DI
o Any non-segment register can be used.
• Memory indirect jump:
JMP WORD PTR [BX]
Far Jump: Target address is outside the present code segment. A far jump instruction replaces the contents of both CS and IP with the four bytes following the opcode
• Direct far JMP
• Memory indirect far jump
JMP DWORD PTR [BX]
53Dr. Ridha Jemal EE353: Introduction to Microprocessor 1431-1432
Jump Instructions
Opcode
Disp. Low Disp. High
CS Low CS HighIP Low IP High
Disp. EB
E9
EA
Short Jump
Near Jump
Far Jump
54Dr. Ridha Jemal EE353: Introduction to Microprocessor 1431-1432
Labels can be defined in
separated lines.
Example: calc andstop
Labels can be defined in the
same line
Example: back
Example: Add two numbers in ax and bx
Comments
Unconditional Jump
Jump Instructions
55Dr. Ridha Jemal EE353: Introduction to Microprocessor 1431-1432
Instruction Description ConditionInstruction inverse
JZ , JE Jump if Zero (Equal). ZF = 1 JNZ, JNE
JC , JB, JNAEJump if Carry (Below, Not Above Equal)
CF = 1 JNC, JNB, JAE
JS Jump if Sign. SF = 1 JNS
JO Jump if Overflow. OF = 1 JNO
JPE, JP Jump if Parity Even. PF = 1 JPO
JNZ , JNE Jump if Not Zero (Not Equal). ZF = 0 JZ, JE
JNC , JNB, JAE
Jump if Not Carry (Not Below, Above Equal)
CF = 0 JC, JB, JNAE
JNS Jump if Not Sign. SF = 0 JS
JNO Jump if Not Overflow. OF = 0 JO
JPO, JNP Jump if Parity Odd (No Parity). PF = 0 JPE, JP
Conditional Jump Checking only one flag
Jump Instructions
56Dr. Ridha Jemal EE353: Introduction to Microprocessor 1431-1432
Conditional Jump Checking only one flag
Jump Instructions
Instruction Name condition
JZ label Jump if Zero Jump if ZF=1
JNZ label Jump if Not Zero Jump if ZF=0
JE label Jump if Equal Jump if ZF=1
JNE label Jump if Not Equal Jump if ZF=0
JC label Jump if Carry Jump if CF=1
JNC label Jump if Not Carry Jump if CF=0
JS label Jump if Sign Jump if SF=1
JNS label Jump if Not Sign Jump if SF=0
JO label Jump if Overflow Jump if OF=1
JNO label Jump if Not Overflow Jump if OF=0
JP label Jump if Parity Jump if PF=1
JNP label Jump if Not Parity Jump if PF=0
57Dr. Ridha Jemal EE353: Introduction to Microprocessor 1431-1432
Instruction Description ConditionInstruction
inverse
JE , JZJump if Equal (=).Jump if Zero.
ZF = 1 JNE, JNZ
JNE , JNZJump if Not Equal (<>).Jump if Not Zero.
ZF = 0 JE, JZ
JG , JNLEJump if Greater (>).Jump if Not Less or Equal (not <=).
ZF = 0 et SF = OF JNG, JLE
JL , JNGEJump if Less (<).Jump if Not Greater or Equal (not >=).
SF <> OF JNL, JGE
JGE , JNLJump if Greater or Equal (>=).Jump if Not Less (not <).
SF = OF JNGE, JL
JLE , JNGJump if Less or Equal (<=).Jump if Not Greater (not >).
ZF = 1 ou SF <> OF JNLE, JG
Conditional Jump Checking on Signed numbers
Jump Instructions
58Dr. Ridha Jemal EE353: Introduction to Microprocessor 1431-1432
Instruction Description Condition Inst.inverse
JE , JZJump if Equal (=).Jump if Zero.
ZF = 1 JNE, JNZ
JNE , JNZJump if Not Equal (<>).Jump if Not Zero.
ZF = 0 JE, JZ
JA , JNBEJump if Above (>).Jump if Not Below or Equal (not <=).
CF = 0 and ZF = 0 JNA, JBE
JB , JNAE, JCJump if Below (<).Jump if Not Above or Equal (not >=).Jump if Carry.
CF = 1 JNB, JAE, JNC
JAE , JNB, JNCJump if Above or Equal (>=).Jump if Not Below (not <).Jump if Not Carry.
CF = 0 JNAE, JB
JBE , JNAJump if Below or Equal (<=).Jump if Not Above (not >).
CF = 1 ou ZF = 1 JNBE, JA
Conditional Jump Checking on Unsigned numbers
Jump Instructions
59Dr. Ridha Jemal EE353: Introduction to Microprocessor 1431-1432
Example
60Dr. Ridha Jemal EE353: Introduction to Microprocessor 1431-1432
Example
We need to add two signed numbers N1 and N2 se located at offsets
1100H and 1101H.
The result is stored at the offset 1103H if it is negative and at the offset
1102H if tit is positive and at the offset 1104H if it is null.
1. Write the corresponding assembly code
61Dr. Ridha Jemal EE353: Introduction to Microprocessor 1431-1432
Example
Start
Result
<0
N1+N2
Result
=0
End
Store Result
in 1103h
Yes
No
Yes
No
Store Result
in 1104h
Store Result
in 1102h
Ex: MOV AL,[1100h] ; Al=N1
ADD AL,[1101h] ; Al=N1+N2
JS Negative
JZ AL,Null
MOV[1102h],AL ;Positive result
JMP End
Negative: MOV[1103h],AL ;Negative result
JMP End
Null: MOV[1104h],AL ;Null result
End: HLT
62Dr. Ridha Jemal EE353: Introduction to Microprocessor 1431-1432
Control Transfer Instructions
Call and Jump Instructions
63Dr. Ridha Jemal EE353: Introduction to Microprocessor 1431-1432
Control Transfer Instructions
Call and Jump Instructions
data segment
SrcBuff DB 1,2,3,4,5,6,7,8,9,10
DesBuff DW 10 dup (0)
Ends
code segment
PI proc near
mov al,cl
mul cl
add ax,2 ; x2 +2
ret
PI endp
start:
mov ax, data
mov ds, ax
mov bx, 10
mov si,offset SrcBuff
mov di,offset DesBuff
x1: mov cl, [si]
call PI
mov [di],ax
inc si
add di,2
dec bx
jnz x1 ; These 2 instructions can be replaced by loop
mov ax, 4c00h ; exit to operating system.
int 21h
Ends
end start ; set entry point and stop the assembler.
Suppose two arrays X and Y containing 10
elements located in the data segment
X is defined within 8 bits (byte) where Y is
defined using 16 bits (word)
64Dr. Ridha Jemal EE353: Introduction to Microprocessor 1431-1432
Control Transfer Instructions
Call and Loop Instructions
data segment
SrcBuff DB 1,2,3,4,5,6,7,8,9,10
DesBuff DW 10 dup (0)
Ends
code segment
PI proc near
mov al,bl
mul bl
add ax,2 ; x2 +2
ret
PI endp
start:
mov ax, data
mov ds, ax
mov cx, 10
mov si,offset SrcBuff
mov di,offset DesBuff
x1: mov bl, [si]
push cx
call PI
pop cx
mov [di],ax
inc si
add di,2
lopp x1
mov ax, 4c00h ; exit to operating system.
int 21h
Ends
end start ; set entry point and stop the assembler.
Suppose two arrays X and Y containing 10
elements located in the data segment
X is defined within 8 bits (byte) where Y is
defined using 16 bits (word)
65Dr. Ridha Jemal EE353: Introduction to Microprocessor 1431-1432
Control Transfer Instructions
Call and Jump Instructions
data segment
ends
code segment
start:
PI proc near
mov al,cl
mul cl
add ax,2 ; x2 +2
ret
PI endp
mov bx, 100
mov si,1000h
mov di,3000h
x1: mov cl, [si]
call PI
mov [di],ax
in si
add di,2
dec bx
jnz x1
mov ax, 4c00h ; exit to operating system.
int 21h
ends
end start ; set entry point and stop the assembler.
66Dr. Ridha Jemal EE353: Introduction to Microprocessor 1431-1432
; multi-segment executable file template.
data segment
MSG1 DB 30h,31h,32h,0Dh,0Ah,'aaa',0dh,0Ah,0
MSG2 DB 'This is a sample line.',0
ends
code segment
string proc near
lodsb
cmp al,0
je stop
mov dl,al
mov ah,2
int 21h
jmp string
stop: ret
start:
; set segment registers:
mov ax, data
mov ds, ax
; add your code here
cld
mov si, offset MSG1
call string
mov si, offset MSG2
call string
mov ax, 4c00h ; exit to operating system.
int 21h
ends
end start ; set entry point and stop the assembler.