Post on 22-May-2018
CSE325 Principles of Operating Systems
Computer System Overview
David Duggan
dduggan@sandia.gov
January 19, 2012
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What is a Computer System?
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Computer System Functional Areas
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Major Computer Components
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Processor
n Internal registers n Memory address register (MAR)
n Specifies the address for the next read or write
n Memory buffer register (MBR) n Contains data written into memory or receives data
read from memory
n I/O address register
n I/O buffer register
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User-Visible Registers
n May be read by user processes
n Available to all programs - application programs and system programs
n Types of registers n Data n Address
n Index n Segment pointer n Stack pointer
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Control and Status Registers
n Program Counter (PC) n Contains the address of an instruction to be fetched
n Instruction Register (IR)
n Contains the instruction most recently fetched
n Program Status Word (PSW)
n Condition codes
n Interrupt enable/disable
n Supervisor/user mode
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Simple Instruction Cycle
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Interrupts
n Suspends the normal sequence of execution
n Used to improve processor utilization
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Interrupt Cycle
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Interrupt Timeline
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Simple Interrupt Processing
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Multiple Interrupts
n Disable interrupts while an interrupt is being processed
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Multiple Interrupts (Cont.)
n Define priorities for interrupts
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Data Transfer on the Bus
CPU!Memory!
memory bus!
I/O bus!
disk! Net interface!
cache!
n cache-memory: cache misses, write-through/write-back
n memory-disk: swapping, paging, file accesses
n memory-network Interface : packet send/receive
n I/O devices to the processor: interrupts
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Two I/O Methods
Synchronous! Asynchronous!
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I/O Operation: Synchronous vs. Asynchronous
n After I/O starts, control returns to user program only upon I/O completion n Wait instruction idles the CPU until operation completes n Wait loop (contention for memory access?) n At most one I/O request is outstanding at a time, no
simultaneous I/O processing
n After I/O starts, control returns to user program without waiting for I/O completion n System call – request to the operating system to allow user
to wait for I/O completion n Device-status table contains entry for each I/O device
indicating its type, address, and state n Operating system indexes into I/O device table to determine
device status and to modify table entry to include interrupt
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Programmed I/O
n I/O module performs the action, not the processor
n Sets appropriate bits in the I/O status register
n No interrupts occur
n Processor checks status until operation is complete
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Interrupt-Driven I/O
n Processor is interrupted when I/O module ready to exchange data
n Processor is free to do other work
n No needless waiting
n Consumes a lot of processor time because every byte read or written passes through the processor
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Direct Memory Access (DMA)
n Used for high-speed I/O devices able to transmit information at close to memory speeds.
n Device controller transfers blocks of data from buffer storage directly to main memory without CPU intervention.
n Only one interrupt is generated per block, rather than the one interrupt per byte.
n Programming a DMA transfer n address of the I/O buffer n starting location in memory n number of bytes n direction of transfer (read/write from/to memory)
n Bus arbitration between cache-memory and DMA transfers
n Memory cache must be consistent with DMA
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Storage-Device Hierarchy
n Decreasing cost per bit
n Increasing capacity
n Increasing access time
n Decreasing frequency of access of the memory by the processor n Locality of reference
n Increasing size of the transfer unit
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Storage Hierarchy
n Storage systems organized in a hierarchy. n Speed
n Cost
n Volatility
n Caching – copying information into faster storage system; main memory can be viewed as a last cache for secondary storage.
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Performance of Various Levels of Storage
n Movement between levels of storage hierarchy can be explicit or implicit
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Cache-Memory Transfers
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Cache Memory
n The mismatch between processor and memory speed
n closer to the processor than the main memory; smaller and faster than the main memory
n contains the value of main memory locations that were recently accessed (temporal locality)
n transfer between caches and main memory is performed in units called cache blocks/lines
n also contains the value of memory locations that are close to locations which were recently accessed (spatial locality)
n Cache performance: miss ratio, miss penalty, average access time
n invisible to the OS, operated by the hardware/firmware CSE325 - Computer System
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Cache/Main Memory System
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Cache Read Operation
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Cache Design
n Mapping function n Determines which cache location the block
will occupy
n Direct-mapped vs. fully-associative vs. set-associative
n Conflict misses
n Replacement algorithm n Determines which block to replace
n Least-Recently-Used (LRU) algorithm
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Cache Design (Cont.)
n Write policy n When the memory write operation takes place
n Can occur every time block is updated: write through
n Can occur only when block is replaced: write back n Minimizes memory write operations
n Leaves main memory in an obsolete state
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Disk Cache/Buffer Cache
n A portion of main memory used as a buffer to temporarily to hold data for the disk
n Disk writes are clustered
n Some data written out may be referenced again. The data are retrieved rapidly from the software cache instead of slowly from disk
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Multiprocessors
CPU!Memory!
memory bus!
I/O bus!
disk! Net interface!
cache!
n more than one processor on the same bus n memory is shared among processors-- cache coherency n goal: performance speedup n single-image operating systems n Multi-core processors (chip-level multiprocessors/CMP)
CPU!cache!
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Clusters of Computers
n network of computers: “share-nothing”
n communication through message-passing
n fast interconnects: memory-to-memory communication
n goals: performance and availability
n each system runs its own operating system
CPU!Memory!
memory bus!
I/O bus!
disk! Net interface!
cache!CPU!
Memory!
memory bus!
I/O bus!
disk!Net interface!
cache!
network!
Reading Assignment 2
n Chapter 2 – By next class
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