CMPUT429/CMPE382 Amaral 1/17/01 CMPUT429/CMPE382 Winter 2001 Topic9: Software Pipelining (Some...

CMPUT429/CMPE382Amaral1/17/01

CMPUT429/CMPE382 Winter 2001

Topic9: Software Pipelining

(Some slides from David A. Patterson’s CS252,

Spring 2001 Lecture Slides)

Another possibility:Software Pipelining

• Observation: if iterations from loops are independent, then we can get more ILP by scheduling execution instructions from different iterations

• Software pipelining: reorganizes loops so that each iteration is made from instructions chosen from different iterations of the original loop

Iteration 0 Iteration

1 Iteration 2 Iteration

3 Iteration 4

Software- pipelined iteration

Software Pipelining ExampleBefore: Unrolled 3 times 1 L.D F0,0(R1) 2 ADD.D F4,F0,F2 3 S.D 0(R1),F4 4 L.D F6,-8(R1) 5 ADD.D F8,F6,F2 6 S.D -8(R1),F8 7 L.D F10,-16(R1) 8 ADD.D F12,F10,F2 9 S.D -16(R1),F12 10 DSUBUI R1,R1,#24 11 BNEZ R1,LOOP

After: Software Pipelined 1 S.D 0(R1),F4 ; Stores M[i] 2 ADD.D F4,F0,F2 ; Adds to

M[i-1] 3 L.D F0,-16(R1);Loads M[i-

2] 4 DSUBUI R1,R1,#8 5 BNEZ R1,LOOP

• Symbolic Loop Unrolling– Maximize result-use distance – Less code space than unrolling– Fill & drain pipe only once per loop vs. once per each unrolled iteration in loop unrolling

SW Pipeline

Loop Unrolled

5 cycles per iteration

Software Pipelining ExampleBefore: Unrolled 3 times 1 L.D F0,0(R1) 2 ADD.D F4,F0,F2 3 S.D 0(R1),F4 4 L.D F6,-8(R1) 5 ADD.D F8,F6,F2 6 S.D -8(R1),F8 7 L.D F10,-16(R1) 8 ADD.D F12,F10,F2 9 S.D -16(R1),F12 10 DSUBUI R1,R1,#24 11 BNEZ R1,LOOP

After: Software PipelinedL.D F0,0(R1)ADD.D F4,F0,F2L.D F0,-8(R1)

------------------------------------L: S.D 0(R1),F4 ; Stores M[i]

ADD.D F4,F0,F2 ; Adds to M[i-1]L.D F0,-16(R1); Loads M[i-2]DSUBUI R1,R1,#8

BNEZ R1,L------------------------------------

S.D -8(R1),F4 ADD.D F4,F0,F2

S.D -16(R1),F4

Software Pipelining ExampleAfter: Software Pipelined

L.D F0,0(R1)ADD.D F4,F0,F2L.D F0,-8(R1)

------------------------------------L: S.D 0(R1),F4 ; Stores M[i]

BNEZ R1,L------------------------------------

S.D -8(R1),F4 ADD.D F4,F0,F2

S.D -16(R1),F4

F0 F2 F4

X[1000]X[999]X[998]X[997]

0xFF000xFEE80xFEE00xFED8

sX[1000]

------------------------------------L: S.D 0(R1),F4 ; Stores M[i]

BNEZ R1,L------------------------------------

S.D -8(R1),F4 ADD.D F4,F0,F2

S.D -16(R1),F4

X[1000]X[999]X[998]X[997]

T1F0 F2 F4

sx[1000]

------------------------------------L: S.D 0(R1),F4 ; Stores M[i]

BNEZ R1,L------------------------------------

S.D -8(R1),F4 ADD.D F4,F0,F2

S.D -16(R1),F4

X[1000]X[999]X[998]X[997]

T1F0 F2 F4

sx[999]

------------------------------------L: S.D 0(R1),F4 ; Stores M[i]

BNEZ R1,L------------------------------------

S.D -8(R1),F4 ADD.D F4,F0,F2

S.D -16(R1),F4

T1X[999]X[998]X[997]

T1F0 F2 F4

sx[999]

------------------------------------L: S.D 0(R1),F4 ; Stores M[i]

BNEZ R1,L------------------------------------

S.D -8(R1),F4 ADD.D F4,F0,F2

S.D -16(R1),F4

X[1000]X[999]X[998]X[997]

T2F0 F2 F4

sx[999]

------------------------------------L: S.D 0(R1),F4 ; Stores M[i]

BNEZ R1,L------------------------------------

S.D -8(R1),F4 ADD.D F4,F0,F2

S.D -16(R1),F4

X[1000]X[999]X[998]X[997]

T2F0 F2 F4

sx[998]

------------------------------------L: S.D 0(R1),F4 ; Stores M[i]

BNEZ R1,L------------------------------------

S.D -8(R1),F4 ADD.D F4,F0,F2

S.D -16(R1),F4

X[1000]X[999]X[998]X[997]

T2F0 F2 F4

sx[998]

------------------------------------L: S.D 0(R1),F4 ; Stores M[i]

BNEZ R1,L------------------------------------

S.D -8(R1),F4 ADD.D F4,F0,F2

S.D -16(R1),F4

X[1000]T2

X[998]X[997]

T2F0 F2 F4

sx[998]

Software Pipelining Example in the IA-64

loop:(p16) ldl r32 = [r12], 1(p17) add r34 = 1, r33(p18) stl [r13] = r35,1

br.ctop loop

32 33 34 35 36 37 38

General Registers (Physical)

0 0116 17 18

Predicate Registers

x1x2x3

Memory

32 33 34 35 36 37 38 39

General Registers (Logical)

br.ctop loop

x132 33 34 35 36 37 38

0 0116 17 18

Predicate Registers

x1x2x3

Memory

32 33 34 35 36 37 38 39

br.ctop loop

0 0116 17 18

Predicate Registers

x1x2x3

Memory

x132 33 34 35 36 37 38

32 33 34 35 36 37 38 39

br.ctop loop

0 0116 17 18

Predicate Registers

x1x2x3

Memory

x132 33 34 35 36 37 38

32 33 34 35 36 37 38 39

br.ctop loop

0 0116 17 18

Predicate Registers

x1x2x3

Memory

x133 34 35 36 37 38 39

32 33 34 35 36 37 38 39

br.ctop loop

1 0116 17 18

Predicate Registers

x1x2x3

Memory

x133 34 35 36 37 38 39

32 33 34 35 36 37 38 39

br.ctop loop

1 0116 17 18

Predicate Registers

x1x2x3

Memory

x133 34 35 36 37 38 39

32 33 34 35 36 37 38 39

br.ctop loop

1 0116 17 18

Predicate Registers

x1x2x3

Memory

x133 34 35 36 37 38 39

32 33 34 35 36 37 38 39

br.ctop loop

1 0116 17 18

Predicate Registers

x1x2x3

Memory

x133 34 35 36 37 38 39

32 33 34 35 36 37 38 39

br.ctop loop

1 0116 17 18

Predicate Registers

x1x2x3

Memory

x133 34 35 36 37 38 39

32 33 34 35 36 37 38 39

br.ctop loop

1 1116 17 18

Predicate Registers

x1x2x3

Memory

x134 35 36 37 38 39 32

32 33 34 35 36 37 38 39

br.ctop loop

1 1116 17 18

Predicate Registers

x1x2x3

Memory

x134 35 36 37 38 39 32

32 33 34 35 36 37 38 39

x2y1 x3

br.ctop loop

1 1116 17 18

Predicate Registers

x1x2x3

Memory

34 35 36 37 38 39 32

32 33 34 35 36 37 38 39

x2y1 x3

br.ctop loop

1 1116 17 18

Predicate Registers

x1x2x3 y1

Memory

y234 35 36 37 38 39 32

32 33 34 35 36 37 38 39

x2y1 x3

br.ctop loop

1 1116 17 18

Predicate Registers

x1x2x3 y1

Memory

y234 35 36 37 38 39 32

32 33 34 35 36 37 38 39

x2y1 x3

br.ctop loop

16 17 18

Predicate Registers

x1x2x3 y1

Memory

y235 36 37 38 39 32 33

32 33 34 35 36 37 38 39

x2y1 x3

br.ctop loop

1 1116 17 18

Predicate Registers

x1x2x3 y1

Memory

y2 x435 36 37 38 39 32 33

32 33 34 35 36 37 38 39

x2y1 x3

br.ctop loop

1 1116 17 18

Predicate Registers

x1x2x3 y1

Memory

y2 x435 36 37 38 39 32 33

32 33 34 35 36 37 38 39

y3y1 x3

br.ctop loop

1 1116 17 18

Predicate Registers

x1x2x3 y1

Memory

y2 x435 36 37 38 39 32 33

32 33 34 35 36 37 38 39

y3y1 x3

1 1116 17 18

Predicate Registers

br.ctop loop

x1x2x3 y1

Memory

y2 x435 36 37 38 39 32 33

32 33 34 35 36 37 38 39

y3y1 x3

1 1116 17 18

Predicate Registers

br.ctop loop

x1x2x3 y1

Memory

y2 x436 37 38 39 32 33 34

32 33 34 35 36 37 38 39

y3y1 x3

1 1116 17 18

Predicate Registers

br.ctop loop

x1x2x3 y1

Memory

y2 x5 x436 37 38 39 32 33 34

32 33 34 35 36 37 38 39

y3y1 x3

1 1116 17 18

Predicate Registers

br.ctop loop

x1x2x3 y1

Memory

y2 x5 x436 37 38 39 32 33 34

32 33 34 35 36 37 38 39

y3y1 y4

1 1116 17 18

Predicate Registers

br.ctop loop

x1x2x3 y1

Memory

y2 x5 x436 37 38 39 32 33 34

32 33 34 35 36 37 38 39

y3y1 y4

1 1116 17 18

Predicate Registers

br.ctop loop

x1x2x3 y1

Memory

y2 x5 x436 37 38 39 32 33 34

32 33 34 35 36 37 38 39

y3y1 y4

1 1016 17 18

Predicate Registers

br.ctop loop

x1x2x3 y1

Memory

y2 x5 x437 38 39 32 33 34 35

32 33 34 35 36 37 38 39

y3y1 y4

1 1016 17 18

Predicate Registers

br.ctop loop

x1x2x3 y1

Memory

y2 x5 x437 38 39 32 33 34 35

32 33 34 35 36 37 38 39

y3y1 y4

1 1016 17 18

Predicate Registers

br.ctop loop

x1x2x3 y1

Memory

y2 x5 y537 38 39 32 33 34 35

32 33 34 35 36 37 38 39

y3y1 y4

1 1016 17 18

Predicate Registers

br.ctop loop

x1x2x3

y1y2y3

Memory

y2 x5 y537 38 39 32 33 34 35

32 33 34 35 36 37 38 39

y3y1 y4

1 1016 17 18

Predicate Registers

br.ctop loop

x1x2x3

y1y2y3

Memory

y2 x5 y537 38 39 32 33 34 35

32 33 34 35 36 37 38 39

y3y1 y4

0 1016 17 18

Predicate Registers

br.ctop loop

x1x2x3

y1y2y3

Memory

y2 x5 y538 39 32 33 34 35 36

32 33 34 35 36 37 38 39

y3y1 y4

0 1016 17 18

Predicate Registers

br.ctop loop

x1x2x3

y1y2y3

Memory

y2 x5 y5

General Registers (Physical)32 33 34 35 36 37 38 39

y3y1 y4

38 39 32 33 34 35 36 37

0 1016 17 18

Predicate Registers

br.ctop loop

x1x2x3

y1y2y3

Memory

y2 x5 y5

y3y1 y4

38 39 32 33 34 35 36 37

0 1016 17 18

Predicate Registers

br.ctop loop

x1x2x3

y1y2y3

Memory

y2 x5 y5

y3y1 y4

38 39 32 33 34 35 36 37

0 1016 17 18

Predicate Registers

br.ctop loop

x1x2x3

y1y2y3

Memory

y2 x5 y5

y3y1 y4

38 39 32 33 34 35 36 37

0 1016 17 18

Predicate Registers

br.ctop loop

x1x2x3

y1y2y3

Memory

y2 x5 y5

y3y1 y4

38 39 32 33 34 35 36 37

0 0016 17 18

Predicate Registers

br.ctop loop

x1x2x3

y1y2y3

Memory

y2 x5 y5

y3y1 y4

38 39 32 33 34 35 36 37

CMPUT429/CMPE382 Amaral 1/17/01 CMPUT429/CMPE382 Winter 2001 Topic9: Software Pipelining (Some...

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