Post on 22-Dec-2015
By Tariq Bashir Ahmad
Taylor Expansion Diagrams (TED)
Adapted from the paperM. Ciesielski, P. Kalla, Z. Zeng, B. Rouzeyre,”Taylor Expansion Diagrams:A Compact Canonical Representation for Symbolic Verification”, in DATE, 2002.
ECE 697B Spring 2006 2
Presentation Structure
Motivation – RTL verification Background
BDD (binary), BMD (word-level) New canonical representation: TED
Construction and manipulation Properties Applications
ECE 697B Spring 2006 3
Motivation – RTL Verification
Complex RTL designs Data flow and control Arithmetic and Boolean
BA
s
10
F
Dak
bk
>
+*-
BA
s
01
F
Dak
bk
<=
+*-
• Equivalence verification– Need representation that can
handle arithmetic/Boolean• Efficient, compact• Canonical
ECE 697B Spring 2006 4
Levels of Abstraction
A[1:0], B[1:0],C[3:0]
C = A1•B1*22 +A1•B0*2 +A0•B1*2 +A0•B0
A[n:0], B[n:0],C[2n:0]
C = A*B
F (*)A
B
C
We can design at a higher level of abstraction, Can we verify at a higher level of abstraction ?
ECE 697B Spring 2006 5
Boolean functions ( f : B B ) Truth table, Karnaugh map SoP, PoS etc. Binary Decision diagrams (BDD)
Arithmetic functions ( f : B Int ) Binary Moment Diagrams (BMD)
Need more abstract representation for arithmetic functions (f : Int Int )
Common Representations
ECE 697B Spring 2006 6
Based on recursive Shannon expansion: f = x fx + x’ fx’
where: fx = f(x=1), fx’=f(x=0)
Compact data structure for Boolean logic Canonical representation
reduced ordered BDDs (ROBDD) Essential for verification
equivalence checking, satisfiability (SAT)
fxfx’
f x
Binary Decision Diagrams (BDD)
ECE 697B Spring 2006 7
Canonicity: equivalence checking of logic circuits
10
a
b
c
F = a’bc + abc +ab’c G = (a+b)c
10
a
b
c
• Limitations– Require bit-level expansion of word-level variables– Size explosion for some functions (arithmetic)
Application to Verification
ECE 697B Spring 2006 8
Devised for word-level, arithmetic operations Based on modified Shannon expansion (pos. Davio)
f = x fx + x’ fx’ = x fx + (1-x) fx’
= fx’ + x (fx - fx’ ) = fx’ + x fx
where fx’ = fx=0 is zero moment
f x = (fx - fx’ ) is first moment (derivative)
Binary Moment Diagrams (BMD)
ECE 697B Spring 2006 9
Efficiently models word-level operators
4
10
x0
x1
x2
12
4
y0
y1
y2
2
1
X Y=X2x1x0 . y2y1y0
=0 1 1 . 1 0 1 = 15
X + Y=X2x1x0 + y2y1y0
=0 1 1 + 1 0 1 = 8
10
x0
x1
x2
y0
y1
y2
12
4
24
1
• Limitation: requires bit-level representation of a word
BMD Example
ECE 697B Spring 2006 10
Why expand words into bits? Can we do better? Abstract words into symbolic variables
Word level
4
10
x0
x1
x2
12
4
y0
y1
y2
2
1
X + Y
10
X
Y
Symbolic
X Y
10
X
Y
Symbolic
10
x0
x1
x2
y0
y1
y2
12
4
24
1
Word level
Symbolic Representation
ECE 697B Spring 2006 11
x
F0(x) F1(x) F2(x) …
F(x)
F(x) = F0(x) + x F1(x) + x2 F2(x) + …
Taylor Expansion Diagram(TED)
F = arithmetic function (F : Int Int ) Treat F as a continuous function
Taylor Expansion (around x=0):
F(x) = F(0) + x F’(0) + ½ x2 F’’(0) + …
Notation
F0(x) = F(x=0) 0-child - - - - -
-
F1(x) = F’(x=0) 1-child ---------- F2(x) = ½ F’’(x=0) 2-child ======… So
ECE 697B Spring 2006 12
F = A2B + 2C + 3 with order A<B<C
A F0(A) = F|A=0 = 2C + 3
F1(A) = F’|A=0 = 2AB|A=0 = 0
F2(A) = ½ F’’|A=0 = B
B
1
A
G= 2C + 3
0
B0 = B(0) = 0
B1=B’ = 1
C G0(C) = (2C+3)|C=0 = 3
G1(C) = (2C+3)’ = 2
C
23
B
B
(without normalization)
Construction of TED example
ECE 697B Spring 2006 13
Few more examples
(A+B)C +1
10
B
C
A
1
(A+B)(A+2C)
10
B
C
A
B
1
2
ECE 697B Spring 2006 14
a
b 0
f
g
b g
1. Eliminate redundant nodes: Nodes with all edges 0 Nodes with only constant term
A
B
C
10 0 11
BB
CC
6 51
A
B
C
01
6 5 12. Merge isomorphic subgraphs
(A2 + 5A + 6)(B + C)
f = 0 a2 + 0 a + g(b) = g(b)
TED Reduction Rules
ECE 697B Spring 2006 15
TED can be normalized weights of edges of a given node must be relatively
prime (to allow sharing isomorphic graphs)
26
B
A
2
2A + 2B + 6
3
0
B
A
1
2
2
1 3
B
A
1
2
11
2(A + B + 3)
TED Normalization
ECE 697B Spring 2006 16
Operation depends on relative order of variables x, y if x = y, then z = x, and
h(x) = f(x) OP g(x)
= f0(x) OP g0(y) + x [f1(x) OP g1(y)] + x2 [f2(x) OP g2], …
if x > y, then z = x, and
h(x) = f0(x) OP g(y) + x [f1(x) OP g(y)] + x2 [f2(x) OP g], …
else ….
u
f
x v
g
yOP =
• Recursive composition of nodes, starting at the top
h = f OP gqz
OP = (+, - , •)
TED Composition
ECE 697B Spring 2006 17
Nodes indexed by same variable
• Nodes indexed by different variable (x > y)
u
u0 u1
x v
v0 v1
x+ =
u
u0 u1
xv
v0 v1
y+ =
u + v
u0+v0 u1+v1
x
u + v
u0+ v
x
u1
COMPOSE Operator – ADD/SUB
ECE 697B Spring 2006 18
Compose Operation Example
2A+B+2C
C
A
B
1
2
2
1
+ =3+5
4+6A
0+5
B
0+0 2 1
C
1+1
A+B
0 1
4
3
A
BC
A+2C
0 1
6
5
A
2
ECE 697B Spring 2006 19
Property BDD TED
Decomposition
Shannon Taylor
Composition And/OR Multiply/Add
CanonicityYes Yes
Reduction rules
Reduction rules +
normalization
Satisfiability Yes No
Comparison of BDD and TED
ECE 697B Spring 2006 20
TED for Arithmetic Circuits
Arithmetic circuits contain related word-level (A, B) and Boolean (ak, bk) variables
A = [ an-1, …, ak , …,a0 ] = 2(k+1)Ahi + 2k ak + Alo
BA
s1
10
F1
Dak
bk
>
+*-
s1 = ak (1-bk)
Ahi Alo
0 1
2k
2(k+1)
Ahi
ak
Alo
ECE 697B Spring 2006 21
Application to RTL Verification
Equivalence checking with TEDs interacting word-level and Boolean variables
A
B
s2
01
F2
bk
ak
*
*-
D
BA
s1
10
F1
Dak
bk
>
+*-
F1 = s1(A+B)(A-B) + (1-s1)Ds1 = (ak > bk) = ak (1-bk)
F2 = (1-s2) (A2-B2) + s2 Ds2 = ak’ bk = 1 - ak + ak bk
A = [Ahi,ak,Alo], B = [Bhi,bk,Blo]
ECE 697B Spring 2006 22
Result: RTL Verification
Related word-level and Boolean variables
F1 = s1(A+B)(A-B) + (1-s1)D
s1 = (ak > bk) = ak (1-bk)
F1 = (ak-akbk){ (2k+1Ahi + 2kak +Alo)2
- (2k+1Bhi + 2k bk + Blo)2 } + (1–ak + akbk) D
1
ak
1
Ahi
D
ak
bk bk
Bhi
Alo
Blo
1
1
22k+2
2k+
2
-2k+
2
2k
-22k+2
-1-1
F1 = F2
Alo
2k
2 k+10
ECE 697B Spring 2006 23
Questions?