ADC – FIR Filter – DAC KEVIN COOLEY. Overview Components Schematic Hardware Design...

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Transcript of ADC – FIR Filter – DAC KEVIN COOLEY. Overview Components Schematic Hardware Design...

ADC – FIR Filter – DACKEVIN COOLEY

Overview Components

Schematic

Hardware Design Considerations

Digital Filters/FPGA Design Tools

Questions

Analog Devices AD9283 8-bit resolution ADC

50 MSPS/80 MSPS/100 MSPS

475 MHz Analog Bandwidth

TTL/CMOS Compatible Digital Outputs and Clock (Encoder) Input

Image Source: www.analog.com

Analog Devices AD9708 8-bit resolution DAC

125 MSPS Update Rate

Differential Current Outputs

CMOS Digital Inputs

Image Source: www.analog.com

Field Programmable Gate Array (FPGA)

Field Programmable Gate Arrays (FPGAs) are semiconductor devices that are based around a matrix of configurable logic blocks (CLBs) connected via programmable interconnects. FPGAs can be reprogrammed to desired application or functionality requirements after manufacturing.

Source: www.Xilinx.com

Image Source: http://www2.hdl.co.jp/

FPGA Basics Easily create and connect

complicated digital structures Shift registers Logic gates (AND/OR/NOR, etc.) Multipliers/Adders/Accumulators State machines Digital filters

Massively parallel processing Each data path has dedicated

hardware No competition for resources

Overview Components

Schematic

Hardware Design Considerations

Digital Filters/FPGA Design Tools

Questions

Overview Components

Schematic

Hardware Design Considerations

Digital Filters/FPGA Design Tools

Questions

High-Speed Digital Bus Routing Route each trace as stripline

Signal traces must be length-matched to keep signal skew within tolerance

Rounded length-matching structures are less likely to radiate than structures with hard right-angles.

Differential pairs need to be length-matched and routed together.

High-Speed Digital Bus Routing

PCB design tools help ensure that “skew group” routing rules are followed.

Overview Components

Schematic

Hardware Design Considerations

Digital Filters/FPGA Design Tools

Questions

Digital Filters: Infinite Impulse Response (IIR) Filter

Has a recursive term (feedback)

Static Timing Analysis Everything has to happen in one

10ns period.

FPGA tools identify critical path.

Pipelining is impossible because of the recursive nature of the filter.

Static Timing Analysis

Static Timing Analysis

Digital Filters: Finite Impulse Response (FIR) Filter

No feedback required!

Even Better: Add Pipelining

Questions?

References Johnson, H., & Graham, M. (1993). High-Speed Digital Design A Handbook of Black Magic. Upper Saddle River: Prentice Hall.

Mitra, S. K. (2011). Digital Signal Processing A Computer-Based Approach. New York: McGraw-Hill.