A Flexible Hybrid Simulation Platform Targeting Multiple Configurable Processors SoC

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TIMA Laboratory

*Hao Shen Frédéric PétrotSystem Level Synthesis Group, TIMA Laboratory,

CNRS/Grenoble INP/UJF43, Avenue Félix Viallet, 38031, Grenoble, France

Outline

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Outline

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Configurable Processors

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GPP DSP Configurable Processor ASIC

Low HighPerformance/Gate and Power Efficiency

High LowFlexibility and Time-to-Market

AcceleratorConfigurable Processor

MPSoC ArchitectureTIMA Laboratory

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Communication

DSP RISC

Memory DMA Peripherals

Configurable Processor

Configurable Processor

CPUCPU

Motivation of the Hybrid SimulationTIMA Laboratory

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HAL API

CPU

MEM DMA

SIMD

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TA level

EDMA

Outline

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What Is Hybrid Simulation Platform?

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DCacheInstruction Set SimulatorsInstruction Set Simulators

Hybrid Simulation MPSoC PlatformTIMA Laboratory

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Applications + OS

HAL APIs

Hardware Abstraction Layer(Target Assembly Codes)

DCacheInstruction Set Simulators

ICache DCache

Memory Periph

Applications + OS

HAL APIs

Hybrid Instruction Set Simulators

ContextSwitch

BootCode

I/OAcces

sLock Interrupt

Handler

Memory Periph

TLM SystemC

Outline

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Hybrid Simulation Platform DetailsTIMA Laboratory

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Hybrid Instruction Set Simulator

HAL APIs RealizationTIMA Laboratory

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Applications and Operating Systemvoid scheduler_commute(pthread_t self){…HAL_CONTEXT_SWITCH(self->reg, thread->reg);}

HAL APIs Wrapper#define HAL_CONTEXT_SWITCH(store_addr, load_addr) ¥xt_iss_simcall(HOST_HAL_CONTEXT_SWITCH, 0, store, load,0,0)

SystemC HAL APIs RealizationInt host_hal_context_switch(int store_addr, int load_addr){map<string, sc_unsigned> current=core.get_all_registers();saveRegWindow(context_map[store_addr], current);loadRegWindow(context_map[load_addr], current);core.set_all_registers(current);}

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Instruction Set Simulators

ICache DCacheInstruction Set Simulators

ICache DCache

Driver Hybrid SimulationTIMA Laboratory

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Applications

HAL+DriverReadB(DMA_STATUS …);WriteB(DMA_ADDR …);

Instruction Set Simulators

ICache DCache

Control Registers

Address Registers

Status Registers……

DMA Device with SystemC

0x00

0x08

0x40

Applications

HAL+DriverDMA_Reset();DMA_Copy(from, to…);

DMA_Reset()

DMA_Copy()

DMA_Check_Status()……

DMA Device with TLM

Hybrid Instruction Set Simulators

Outline

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Motion-JPEG Decoder Example

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Accuracy of Hybrid PlatformTIMA Laboratory

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Hybrid Platform

Traditional ISS Platform Difference

Extended Instructions Acceleration Ratio 1.71 1.53 10%

DMA Transfer ExampleTIMA Laboratory

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int ta_dma::dma_ss_copy ( xtsc_core &core,int from, int to, int size)

{// Copy original data to DMA buffer.core.peek_physical(from, size, buff);// Consume time for this copy operationconsume(size/4*time_per_word);// Copy DMA buffer to Target Memory core.poke_physical(to, size, buff);return size;

}

Development EffortTIMA Laboratory

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Module Name SLOC of the hybrid platform

SLOC of the traditional platform

DMA 79 267context 202 257 (206 lines of asm code)stack 48 14 (6 lines of asm code)

Outline

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Conclusion and Future Works

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Hao.Shen@imag.fr

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