8085.Ppt Changed

Post on 27-Nov-2014

157 views 0 download

Transcript of 8085.Ppt Changed

80858085

ContentsContents

Microprocessor Microprocessor ArchitectureArchitecture

Instruction Set and Instruction Set and Addressing modeAddressing mode

Microprocessor ?Microprocessor ?

A microprocessor is multi A microprocessor is multi programmable clock driven programmable clock driven

register based register based semiconductor device that is semiconductor device that is used to fetch , process and used to fetch , process and

execute a data within execute a data within fraction of seconds.fraction of seconds.

PIN CONFIGURATIONPIN CONFIGURATION

THE 8085 AND ITS THE 8085 AND ITS BUSSESBUSSESThe 8085 is an 8-bit general purpose

microprocessor that can address 64K Byte of memory. It has 40 pins and uses +5V for power. It can run at a maximum frequency of 3 MHz.

-The pins on the chip can be grouped into 6 groups:

Address Bus.Data Bus.Control and Status Signals.Power supply and frequency.Externally Initiated Signals.Serial I/O ports.

The Address and Data The Address and Data BussesBusses

The address bus has 8 signal lines A8 – A15 which The address bus has 8 signal lines A8 – A15 which are unidirectional.are unidirectional.

The other 8 address bits are multiplexed (time The other 8 address bits are multiplexed (time shared) with the 8 data bits.shared) with the 8 data bits. So, the bits AD0 – AD7 are bi-directional and So, the bits AD0 – AD7 are bi-directional and

serve as A0 – A7 and D0 – D7 at the same time.serve as A0 – A7 and D0 – D7 at the same time. During the execution of the instruction, these During the execution of the instruction, these

lines carry the address bits during the early lines carry the address bits during the early part, then during the late parts of the part, then during the late parts of the execution, they carry the 8 data bits.execution, they carry the 8 data bits.

In order to separate the address from the data, In order to separate the address from the data, we can use a latch to save the value before the we can use a latch to save the value before the function of the bits changes.function of the bits changes.

Interrupt controller Serial I/O controller

Accumulator

ALU

Flag Flip Flops

Temp Reg

Instruction Reg

Instruction Decoder and Machine Cycle Encoding

Multiplexer

W temp

Z temp

B C

D E

H L

Stack Pointer (16)

Program counter (16)

Inc/dec latch

8085 ARCHITECTURE8085 ARCHITECTURE

Timing and controlClk gen

Control Status DMA Reset Address Buffer Data/ Address

Buffer

Clk

ou

t

Rea

dy

S0

S1

IO/M

HO

LD

HLD

A

Res

et in

Res

et

outR

D

WR

ALE

X1

X2

A15 –A8 Address

Buss

AD0 –AD7 Address/

Data Buss

SID SO

D

INT

A

RS

T 5

.5

RS

T 6

.5

RS

T 7

.5

TR

AP

INT

R8 bit internal Data Bus

Reg

arr

ay

Flag RegisterFlag Register

CY CY PPACAC ZZ S S D0 D0 D1D1D2D2D3D3D4D4D5D5D6D6D7D7

The flags are affected by the arithmetic and logical instruction

AccumulatorAccumulator

It is an 8 bit registerIt is an 8 bit register For any arithmetic and logical For any arithmetic and logical

instruction one of the data should be in instruction one of the data should be in this registerthis register

It is used for storing the result of any It is used for storing the result of any arithmetic and logical manipulations.arithmetic and logical manipulations.

It is also called as A registerIt is also called as A register All the data which are sent to I/O devices All the data which are sent to I/O devices

are sent via A register.are sent via A register.

Temporary registerTemporary register

It is used to hold the data It is used to hold the data during the operation of during the operation of arithmetic and logical arithmetic and logical operationoperation

Sign FlagSign Flag

If the D7 bit of the If the D7 bit of the accumulator is set then this accumulator is set then this flag is set i.e 1 meaning that flag is set i.e 1 meaning that the result is in negative.the result is in negative.

Ex. 7-8 = -1Ex. 7-8 = -1

Carry flagCarry flag

During the arithmetic operation if a During the arithmetic operation if a carry occurs then this flag is set.carry occurs then this flag is set.

Ex. F1+1F= 10Ex. F1+1F= 101

Carry

Zero flagZero flag

During the arithmetic/ During the arithmetic/ logical operation if the logical operation if the result is zero then this result is zero then this flag is set.flag is set.

Ex. FF-FF = 00Ex. FF-FF = 00

Parity flagParity flag

After the of the arithmetic After the of the arithmetic and logical operation if the and logical operation if the result is even then this flag is result is even then this flag is set.set.

Ex. 0A-02 = 08Ex. 0A-02 = 08

Auxiliary carry flagAuxiliary carry flag

During BCD arithmetic operation During BCD arithmetic operation when a carry is generated by D3 when a carry is generated by D3 bit and passed on to D4 bit then bit and passed on to D4 bit then this flag is set.this flag is set.

Ex. 1F+11 = 0001 1111 + Ex. 1F+11 = 0001 1111 +

0001 00010001 0001

= 0010 0000= 0010 0000

Timing and controlTiming and control

It synchronizes all the It synchronizes all the operation with the clock operation with the clock and generates the and generates the communication between communication between the microprocessor and the microprocessor and peripheralsperipherals

Instruction Register and Instruction Register and decoderdecoder

The instruction is loaded The instruction is loaded in the instruction registerin the instruction register

The decoder decodes them The decoder decodes them and establishes the and establishes the operation that has to be operation that has to be performedperformed

Register arrayRegister array

The W and Z register are The W and Z register are temporary registerstemporary registers

Used to hold the 8 bit data Used to hold the 8 bit data during the execution and it is during the execution and it is used internally .used internally .

It is not used by the It is not used by the programmer.programmer.

Control and status Control and status signalssignals

Machine Machine CycleCycle

IO/MIO/M SS11 SS00

Opcode Opcode fetchfetch

00 11 11

Memory Memory readread

00 11 00

Memory Memory writewrite

00 00 11

I/O readI/O read 11 11 00

I/O writeI/O write 11 00 11

Interrupt Interrupt ackack

11 11 11

HaltHalt ZZ 00 00

HoldHold ZZ XX XX

ResetReset Z Z XX XX

Arithmetic and Logical Arithmetic and Logical unitunit

It is an 8 bit registerIt is an 8 bit registerIt is used for performing It is used for performing

addition, subtraction and addition, subtraction and logical operation.logical operation.

AND, OR, NOT, XOR, CMP AND, OR, NOT, XOR, CMP are some of the logical are some of the logical operation.operation.

Program CounterProgram Counter

It is a 16 bit registerIt is a 16 bit registerIt is used to point out It is used to point out the address of the next the address of the next instruction which is to instruction which is to be executedbe executed

Stack pointerStack pointer

It is a 16 bit registerIt is a 16 bit register It points the starting address It points the starting address

of the stack .of the stack .

Register ArrayRegister Array

B, C, D, E, H and L are B, C, D, E, H and L are general purpose register general purpose register

All are 8 bit registerAll are 8 bit register If the are combined as BC, If the are combined as BC,

DE and HL they can store 16 DE and HL they can store 16 bit data bit data

Instruction setInstruction set

An instruction is a binary An instruction is a binary pattern designed inside a pattern designed inside a microprocessor to perform a microprocessor to perform a specific function.specific function.

A group of instruction together A group of instruction together called as instruction set.called as instruction set.

Group of instruction set is Group of instruction set is called as a program.called as a program.

Classification of Classification of instruction setinstruction set

According to word size or According to word size or byte size it is classified into byte size it is classified into 3 types.3 types.

1 - byte instruction1 - byte instruction 2 - byte instruction 2 - byte instruction and and 3 - byte instruction3 - byte instruction

1 byte instruction1 byte instruction

It includes the It includes the Opcode Opcode and the and the OperandOperand in the same byte. in the same byte.

Ex. MOV A,B Ex. MOV A,B Ex. CMP BEx. CMP B Ex. ANA BEx. ANA B Ex. RALEx. RAL

Opcode an operandOpcode an operand

The task to be performed The task to be performed is called Opcodeis called Opcode

The data to be operated is The data to be operated is called Operand.called Operand.

2 byte instruction2 byte instruction

The first byte specifies the The first byte specifies the operation cod eand the next operation cod eand the next byte specifies the operandbyte specifies the operand

Ex. MVI A, 10Ex. MVI A, 10 Ex. SUI A, 34Ex. SUI A, 34

3 byte instruction3 byte instruction

The first byte specifies the The first byte specifies the opcode and the next two opcode and the next two bytes specifies the 16 bit bytes specifies the 16 bit address/data.address/data.

Ex. LXI H, 4500Ex. LXI H, 4500 Ex. JMP 5000Ex. JMP 5000

Classification of Classification of InstructionsInstructions

The 8085 instruction are classified The 8085 instruction are classified into 5 categories. They are..into 5 categories. They are..

Data transfer operationsData transfer operations Arithmetic operationsArithmetic operations Logical operationsLogical operations Branching operations Branching operations and and Machine control operationMachine control operation

Data transfer operationsData transfer operations

Group of data form a source location are Group of data form a source location are copied to the destination location copied to the destination location without changing the original data.without changing the original data.

Various types of data transfer are:Various types of data transfer are: Between registersBetween registers Specific byte to a register or a memory Specific byte to a register or a memory

locationlocation Between memory location and a registerBetween memory location and a register Between an I/O device and accumulatorBetween an I/O device and accumulator

Arithmetic operationsArithmetic operations

Function like addition, Function like addition, subtraction, increment and subtraction, increment and decrement operation are decrement operation are performedperformed

Ex. ADD BEx. ADD B

Ex. SUB BEx. SUB B

Ex. INR BEx. INR B

Ex. DCX HEx. DCX H

Logical operationLogical operation

These instruction perform various These instruction perform various logical operation with the contents logical operation with the contents of the accumulator.of the accumulator.

Ex. AND BEx. AND B Ex. ORAEx. ORA Ex. RAR Ex. RAR Ex. CMP BEx. CMP B Ex. CMA Ex. CMA

Branching operationBranching operation

It alters the sequence of It alters the sequence of program executing either program executing either conditionally are conditionally are unconditionally unconditionally

Ex. JMP 5000 Ex. JMP 5000 Ex. JNC 4500Ex. JNC 4500

Machine control Machine control operationoperation

It controls the machine It controls the machine operationoperation

Ex. HALTEx. HALT Ex. NOPEx. NOP Ex. INTREx. INTR

Addressing modesAddressing modes The various ways of specifying the The various ways of specifying the

operand are called the addressing mode.operand are called the addressing mode.

It classified is asIt classified is as Immediate addressingImmediate addressing Register addressingRegister addressing Direct addressingDirect addressing Indirect addressingIndirect addressing Implied addressing modeImplied addressing mode

Immediate addressing Immediate addressing modemode

Instructions that use Instructions that use immediate addressingimmediate addressing

MVI R, DATAMVI R, DATA

Register Addressing Register Addressing modemode

MOV Rd, RsMOV Rd, Rs

Direct addressing modeDirect addressing mode

Instructions that include a Instructions that include a direct address direct address

IN/OUT Port #IN/OUT Port #

LDA 4500LDA 4500

Indirect addressing Indirect addressing modemode

Register indirect instructions Register indirect instructions reference memory via a register reference memory via a register pair. pair.

LXI Rp, 16 bit addressLXI Rp, 16 bit address

Implied addressing Implied addressing modemode

Instruction deals with the Instruction deals with the accumulator accumulator

ORA ORA

RALRAL